“门偏效应”对BSIT饱和特性的影响

1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105) Pub Date : 1998-10-21 DOI:10.1109/ICSICT.1998.785837

Jiang Yanfeng, L. Siyuan, Li Hairong, Meng Xionghui

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引用次数: 0

摘要

对于BSIT，众所周知，漏极电流和漏极电压相对于源的理想关系是五极状的，即饱和特性。但实际测量结果表明，随着V/sub D/的升高，I/sub D/略有增加，就像在BJT中观察到的现象一样，受“基宽调制”的影响。作者推断其主要原因是“门偏效应”。本文对其影响进行了详细的讨论。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Influence of "gate-biasing effect" on BSIT's saturated property

For BSIT, it is well-known that the ideal relation between the drain current and the drain voltage with respect to the source is pentode-like, the saturated property. But the result from practical measurements shows I/sub D/ increases slightly with rising V/sub D/, just like the phenomenon observed in a BJT, which is affected by "base width modulation". The authors deduce that the main cause is "gate-biasing effect". In this article, the effect is discussed in detail.

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1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)

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