{"title":"14nm FinFET CMOS中用于5G相控阵的73GHz PA","authors":"Steven Callender, S. Pellerano, C. Hull","doi":"10.1109/RFIC.2017.7969103","DOIUrl":null,"url":null,"abstract":"This paper presents the design of an E-band PA in Intel 14nm FinFET/trigate CMOS process. Device layout optimizations are used to maximize device performance at mm-wave frequencies and overcome the impact of scaling on RF performance. Neutralization and low-k transformer-based matching networks are employed to improve gain and bandwidth. The PA achieves a peak gain of 11.9dB/16.7 dB at 71GHz with a bandwidth of 8.5GHz/7.4 GHz in low-gain/high-gain mode. At 71GHz, the measured Psat, OP1dB and peak PAE are 7.3dBm, 1.6dBm, and 8.3%, respectively.","PeriodicalId":349922,"journal":{"name":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","volume":"23 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2017-06-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"A 73GHz PA for 5G phased arrays in 14nm FinFET CMOS\",\"authors\":\"Steven Callender, S. Pellerano, C. Hull\",\"doi\":\"10.1109/RFIC.2017.7969103\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents the design of an E-band PA in Intel 14nm FinFET/trigate CMOS process. Device layout optimizations are used to maximize device performance at mm-wave frequencies and overcome the impact of scaling on RF performance. Neutralization and low-k transformer-based matching networks are employed to improve gain and bandwidth. The PA achieves a peak gain of 11.9dB/16.7 dB at 71GHz with a bandwidth of 8.5GHz/7.4 GHz in low-gain/high-gain mode. At 71GHz, the measured Psat, OP1dB and peak PAE are 7.3dBm, 1.6dBm, and 8.3%, respectively.\",\"PeriodicalId\":349922,\"journal\":{\"name\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"volume\":\"23 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2017-06-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/RFIC.2017.7969103\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2017 IEEE Radio Frequency Integrated Circuits Symposium (RFIC)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/RFIC.2017.7969103","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A 73GHz PA for 5G phased arrays in 14nm FinFET CMOS
This paper presents the design of an E-band PA in Intel 14nm FinFET/trigate CMOS process. Device layout optimizations are used to maximize device performance at mm-wave frequencies and overcome the impact of scaling on RF performance. Neutralization and low-k transformer-based matching networks are employed to improve gain and bandwidth. The PA achieves a peak gain of 11.9dB/16.7 dB at 71GHz with a bandwidth of 8.5GHz/7.4 GHz in low-gain/high-gain mode. At 71GHz, the measured Psat, OP1dB and peak PAE are 7.3dBm, 1.6dBm, and 8.3%, respectively.
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