{"title":"具有串扰约束的全局路由","authors":"H. Zhou, Martin D. F. Wong","doi":"10.1145/277044.277147","DOIUrl":null,"url":null,"abstract":"Due to the scaling down of device geometry and increasing frequency in deep sub-micron designs, crosstalk between interconnection wires has become an important issue in VLSI layout design. In this paper, we consider crosstalk avoidance during global routing. We present a global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique. We also give theoretical results on the complexity of the problem.","PeriodicalId":221221,"journal":{"name":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","volume":"41 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"181","resultStr":"{\"title\":\"Global routing with crosstalk constraints\",\"authors\":\"H. Zhou, Martin D. F. Wong\",\"doi\":\"10.1145/277044.277147\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Due to the scaling down of device geometry and increasing frequency in deep sub-micron designs, crosstalk between interconnection wires has become an important issue in VLSI layout design. In this paper, we consider crosstalk avoidance during global routing. We present a global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique. We also give theoretical results on the complexity of the problem.\",\"PeriodicalId\":221221,\"journal\":{\"name\":\"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)\",\"volume\":\"41 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-05-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"181\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1145/277044.277147\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1145/277044.277147","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Due to the scaling down of device geometry and increasing frequency in deep sub-micron designs, crosstalk between interconnection wires has become an important issue in VLSI layout design. In this paper, we consider crosstalk avoidance during global routing. We present a global routing algorithm based on a new Steiner tree formulation and the Lagrangian relaxation technique. We also give theoretical results on the complexity of the problem.