{"title":"IC测试仪的实际限制","authors":"J. Trnka","doi":"10.1109/ISSCC.1986.1156932","DOIUrl":null,"url":null,"abstract":"As analog and digital integrated circuits achieve higher levels of integration, testing and test time become a more serious production problem. To keep testing under control, manufacturers are relying on several methods to obtain an acceptable quality level for ICs. These include tighter process control, high temperature testing, limited pattern tests, special circuits for test, and wafer rejection criteria. The panel will provide integrated circuit producer's viewpoints on testing to meet quality level targets, and user's perspective on how well they are doing.","PeriodicalId":440688,"journal":{"name":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"16 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Practical limits of IC testers\",\"authors\":\"J. Trnka\",\"doi\":\"10.1109/ISSCC.1986.1156932\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"As analog and digital integrated circuits achieve higher levels of integration, testing and test time become a more serious production problem. To keep testing under control, manufacturers are relying on several methods to obtain an acceptable quality level for ICs. These include tighter process control, high temperature testing, limited pattern tests, special circuits for test, and wafer rejection criteria. The panel will provide integrated circuit producer's viewpoints on testing to meet quality level targets, and user's perspective on how well they are doing.\",\"PeriodicalId\":440688,\"journal\":{\"name\":\"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"16 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1986.1156932\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1986 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1986.1156932","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
As analog and digital integrated circuits achieve higher levels of integration, testing and test time become a more serious production problem. To keep testing under control, manufacturers are relying on several methods to obtain an acceptable quality level for ICs. These include tighter process control, high temperature testing, limited pattern tests, special circuits for test, and wafer rejection criteria. The panel will provide integrated circuit producer's viewpoints on testing to meet quality level targets, and user's perspective on how well they are doing.