{"title":"用多电平逆变器降低共模电压","authors":"Aniruddha V. Jadhav, P. Kapoor","doi":"10.1109/ICEETS.2016.7583822","DOIUrl":null,"url":null,"abstract":"In this paper, a direction to reduce common-mode voltage (CMV) at the output of multilevel inverters (MLI) using a sinusoidal pulse width modulation (SPWM) technique is discuss. As SPWM technique does not require computations therefore, it is easy to implement in digital controllers. This paper makes the simulation implementation of a SPWM technique to reduce CMV using a three-level inverter for a three phase RL-load. Simulation results shows and explain the feasibility of the proposed technique.","PeriodicalId":215798,"journal":{"name":"2016 International Conference on Energy Efficient Technologies for Sustainability (ICEETS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2016-10-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"4","resultStr":"{\"title\":\"Reduction of common mode voltage using multilevel inverter\",\"authors\":\"Aniruddha V. Jadhav, P. Kapoor\",\"doi\":\"10.1109/ICEETS.2016.7583822\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a direction to reduce common-mode voltage (CMV) at the output of multilevel inverters (MLI) using a sinusoidal pulse width modulation (SPWM) technique is discuss. As SPWM technique does not require computations therefore, it is easy to implement in digital controllers. This paper makes the simulation implementation of a SPWM technique to reduce CMV using a three-level inverter for a three phase RL-load. Simulation results shows and explain the feasibility of the proposed technique.\",\"PeriodicalId\":215798,\"journal\":{\"name\":\"2016 International Conference on Energy Efficient Technologies for Sustainability (ICEETS)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2016-10-06\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"4\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2016 International Conference on Energy Efficient Technologies for Sustainability (ICEETS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICEETS.2016.7583822\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2016 International Conference on Energy Efficient Technologies for Sustainability (ICEETS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICEETS.2016.7583822","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reduction of common mode voltage using multilevel inverter
In this paper, a direction to reduce common-mode voltage (CMV) at the output of multilevel inverters (MLI) using a sinusoidal pulse width modulation (SPWM) technique is discuss. As SPWM technique does not require computations therefore, it is easy to implement in digital controllers. This paper makes the simulation implementation of a SPWM technique to reduce CMV using a three-level inverter for a three phase RL-load. Simulation results shows and explain the feasibility of the proposed technique.