{"title":"用于内置测试信号生成的低功耗温度补偿弛豫振荡器","authors":"Li Xu, M. Onabajo","doi":"10.1109/MWSCAS.2015.7282022","DOIUrl":null,"url":null,"abstract":"An on-chip frequency reference for built-in testing and calibration applications is presented. The design combines a proportional-to-absolute-temperature (PTAT) current reference and a relaxation oscillator core. A temperature compensation scheme is realized based on the thermal voltage, for which simulations indicate low sensitivity to process variations. The oscillator was designed and simulated in a 130nm CMOS process with a power supply of 1.2V. It generates a 40KHz output and occupies a layout area of 0.025mm2. A temperature coefficient of 101ppm/°C is achieved over the range from -30°C to 85°C. The simulated phase noise is -90dBc/Hz at 10KHz offset.","PeriodicalId":216613,"journal":{"name":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","volume":"148 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2015-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"9","resultStr":"{\"title\":\"A low-power temperature-compensated relaxation oscillator for built-in test signal generation\",\"authors\":\"Li Xu, M. Onabajo\",\"doi\":\"10.1109/MWSCAS.2015.7282022\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An on-chip frequency reference for built-in testing and calibration applications is presented. The design combines a proportional-to-absolute-temperature (PTAT) current reference and a relaxation oscillator core. A temperature compensation scheme is realized based on the thermal voltage, for which simulations indicate low sensitivity to process variations. The oscillator was designed and simulated in a 130nm CMOS process with a power supply of 1.2V. It generates a 40KHz output and occupies a layout area of 0.025mm2. A temperature coefficient of 101ppm/°C is achieved over the range from -30°C to 85°C. The simulated phase noise is -90dBc/Hz at 10KHz offset.\",\"PeriodicalId\":216613,\"journal\":{\"name\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"volume\":\"148 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2015-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"9\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2015.7282022\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2015 IEEE 58th International Midwest Symposium on Circuits and Systems (MWSCAS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2015.7282022","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low-power temperature-compensated relaxation oscillator for built-in test signal generation
An on-chip frequency reference for built-in testing and calibration applications is presented. The design combines a proportional-to-absolute-temperature (PTAT) current reference and a relaxation oscillator core. A temperature compensation scheme is realized based on the thermal voltage, for which simulations indicate low sensitivity to process variations. The oscillator was designed and simulated in a 130nm CMOS process with a power supply of 1.2V. It generates a 40KHz output and occupies a layout area of 0.025mm2. A temperature coefficient of 101ppm/°C is achieved over the range from -30°C to 85°C. The simulated phase noise is -90dBc/Hz at 10KHz offset.