{"title":"实时延迟和波束形成器的FPGA原型实现","authors":"Angela P. Cuadros, Cesar L. Nino","doi":"10.1109/ANDESCON.2014.7098568","DOIUrl":null,"url":null,"abstract":"Summary form only given. This article describes a prototype FPGA implementation, of a delay-and-sum beamformer in the audio frequency range. This prototype is essentially a real-time acoustic camera, which is used to estimate a sound field intensity. Data acquisition is performed by means of a 4-microphone square array and the delay- and-sum beamforming algorithm is implemented on a Xilinx Spartan 3AN FPGA. The computed acoustic intensity images are visualized in a TFT display of a resolution of 320×240 pixels, at 26 frames-per-second.","PeriodicalId":123628,"journal":{"name":"2014 IEEE ANDESCON","volume":"57 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"A prototype FPGA implementation of a real-time delay-and-sum beamformer\",\"authors\":\"Angela P. Cuadros, Cesar L. Nino\",\"doi\":\"10.1109/ANDESCON.2014.7098568\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Summary form only given. This article describes a prototype FPGA implementation, of a delay-and-sum beamformer in the audio frequency range. This prototype is essentially a real-time acoustic camera, which is used to estimate a sound field intensity. Data acquisition is performed by means of a 4-microphone square array and the delay- and-sum beamforming algorithm is implemented on a Xilinx Spartan 3AN FPGA. The computed acoustic intensity images are visualized in a TFT display of a resolution of 320×240 pixels, at 26 frames-per-second.\",\"PeriodicalId\":123628,\"journal\":{\"name\":\"2014 IEEE ANDESCON\",\"volume\":\"57 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-10-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2014 IEEE ANDESCON\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ANDESCON.2014.7098568\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2014 IEEE ANDESCON","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ANDESCON.2014.7098568","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A prototype FPGA implementation of a real-time delay-and-sum beamformer
Summary form only given. This article describes a prototype FPGA implementation, of a delay-and-sum beamformer in the audio frequency range. This prototype is essentially a real-time acoustic camera, which is used to estimate a sound field intensity. Data acquisition is performed by means of a 4-microphone square array and the delay- and-sum beamforming algorithm is implemented on a Xilinx Spartan 3AN FPGA. The computed acoustic intensity images are visualized in a TFT display of a resolution of 320×240 pixels, at 26 frames-per-second.