{"title":"多输出CMOS门的合成","authors":"G. Buonanno, D. Sciuto, R. Stefanelli","doi":"10.1109/ISVD.1991.185092","DOIUrl":null,"url":null,"abstract":"Design of static CMOS gates for multiple output functions is presented. Two techniques for minimization of multiple output functions at the switching level are introduced. These techniques are based on innovative transistor interconnection structures named delta and lambda networks. Design examples on double output functions are provided. It is shown that the two techniques can be combined together, if necessary, to obtain further area reductions.<<ETX>>","PeriodicalId":183602,"journal":{"name":"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design","volume":"38 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-01-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Synthesis of multiple outputs CMOS gates\",\"authors\":\"G. Buonanno, D. Sciuto, R. Stefanelli\",\"doi\":\"10.1109/ISVD.1991.185092\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Design of static CMOS gates for multiple output functions is presented. Two techniques for minimization of multiple output functions at the switching level are introduced. These techniques are based on innovative transistor interconnection structures named delta and lambda networks. Design examples on double output functions are provided. It is shown that the two techniques can be combined together, if necessary, to obtain further area reductions.<<ETX>>\",\"PeriodicalId\":183602,\"journal\":{\"name\":\"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design\",\"volume\":\"38 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-01-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISVD.1991.185092\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings. Fourth CSI/IEEE International Symposium on VLSI Design","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISVD.1991.185092","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Design of static CMOS gates for multiple output functions is presented. Two techniques for minimization of multiple output functions at the switching level are introduced. These techniques are based on innovative transistor interconnection structures named delta and lambda networks. Design examples on double output functions are provided. It is shown that the two techniques can be combined together, if necessary, to obtain further area reductions.<>