PMOS NBTI analysis of a 45nm CMOS-SOI process with nitrided gate dielectric

As a consequence of the semiconductor industry chasing Moore's Law, device scaling and changes to the transistor's material system has introduced significant emerging reliability concerns which have the potential for drastically shortening device and hence product lifetimes. Given that semiconductor technologies leveraged for analog and mixed-signal designs in military and aerospace systems tend to lag behind industry, the extent and potential ramifications of the impending reliability problem has yet to be fully appreciated by the respective communities. Radiation effects and extended operating conditions, commonplace in military and aerospace systems, exacerbate the situation. In this paper, the initial results and analysis of the reliability concern of Negative Bias Temperature Instability (NBTI) in p-channel Metal Oxide Semiconductors (PMOS) devices fabricated in a 45nm CMOS-SOI process will be presented. In addition, the prospect of ionizing space-radiation on PMOS NBTI device reliability will be introduced progressing to the topic of further proposed research, PMOS NBTI in an ionizing radiation environment.