{"title":"高性能多引擎正则表达式处理","authors":"T. Arumugam, S. Sezer, D. Burns, V. Vasu","doi":"10.1109/SOCC.2011.6085117","DOIUrl":null,"url":null,"abstract":"This paper discusses a novel multi-engine hardware based regular expression processor. Regular expression is widely used as a pattern matching technique to detect presence of malicious content in Internet traffic. In the proposed approach, parallel IP flows are handled by separate regular expression processing engines, sharing a common program memory. The proposed architecture has been designed and implemented for a four engine system using Altera Stratix IV technology. With four independent engines operating at 185.43 MHz the achievable system bandwidth is estimated to be 5.93 Gbps, using approximately 20K ALUTs.","PeriodicalId":365422,"journal":{"name":"2011 IEEE International SOC Conference","volume":null,"pages":null},"PeriodicalIF":0.0000,"publicationDate":"2011-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"High performance multi-engine regular expression processing\",\"authors\":\"T. Arumugam, S. Sezer, D. Burns, V. Vasu\",\"doi\":\"10.1109/SOCC.2011.6085117\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper discusses a novel multi-engine hardware based regular expression processor. Regular expression is widely used as a pattern matching technique to detect presence of malicious content in Internet traffic. In the proposed approach, parallel IP flows are handled by separate regular expression processing engines, sharing a common program memory. The proposed architecture has been designed and implemented for a four engine system using Altera Stratix IV technology. With four independent engines operating at 185.43 MHz the achievable system bandwidth is estimated to be 5.93 Gbps, using approximately 20K ALUTs.\",\"PeriodicalId\":365422,\"journal\":{\"name\":\"2011 IEEE International SOC Conference\",\"volume\":null,\"pages\":null},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-11-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2011 IEEE International SOC Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOCC.2011.6085117\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2011 IEEE International SOC Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOCC.2011.6085117","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
High performance multi-engine regular expression processing
This paper discusses a novel multi-engine hardware based regular expression processor. Regular expression is widely used as a pattern matching technique to detect presence of malicious content in Internet traffic. In the proposed approach, parallel IP flows are handled by separate regular expression processing engines, sharing a common program memory. The proposed architecture has been designed and implemented for a four engine system using Altera Stratix IV technology. With four independent engines operating at 185.43 MHz the achievable system bandwidth is estimated to be 5.93 Gbps, using approximately 20K ALUTs.