{"title":"电源集成电路设计的ASIC方法","authors":"P. Shackle, I. Wacyk, J. Woo","doi":"10.1109/ISPSD.1990.991050","DOIUrl":null,"url":null,"abstract":"A design methodology for mixed analoddigitupower ICs has been developed. It uses a cell library of common power control functions and a device lsyout compiler for automatic generation of power devices. A proprietary mixed mode simulator uses models stored with each cell design to simulate complete chips in their power system. Placement and routing of control circuitry is achieved with commercially available tools. The control circuitry is united with the power devices, drivers and bonding pads with a chip assembler program.","PeriodicalId":162198,"journal":{"name":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","volume":"29 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1990-04-04","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"An ASIC approach to power IC design\",\"authors\":\"P. Shackle, I. Wacyk, J. Woo\",\"doi\":\"10.1109/ISPSD.1990.991050\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A design methodology for mixed analoddigitupower ICs has been developed. It uses a cell library of common power control functions and a device lsyout compiler for automatic generation of power devices. A proprietary mixed mode simulator uses models stored with each cell design to simulate complete chips in their power system. Placement and routing of control circuitry is achieved with commercially available tools. The control circuitry is united with the power devices, drivers and bonding pads with a chip assembler program.\",\"PeriodicalId\":162198,\"journal\":{\"name\":\"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.\",\"volume\":\"29 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1990-04-04\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISPSD.1990.991050\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 2nd International Symposium on Power Semiconductor Devices and Ics. ISPSD '90.","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISPSD.1990.991050","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A design methodology for mixed analoddigitupower ICs has been developed. It uses a cell library of common power control functions and a device lsyout compiler for automatic generation of power devices. A proprietary mixed mode simulator uses models stored with each cell design to simulate complete chips in their power system. Placement and routing of control circuitry is achieved with commercially available tools. The control circuitry is united with the power devices, drivers and bonding pads with a chip assembler program.