用于实时1080HD视频编解码器的H.264整像素运动估计IP的高性能架构

Hoyoung Chang, Soojin Kim, Seonyoung Lee, Kyeongsoon Cho
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引用次数: 3

摘要

为了提高处理速度,我们提出了一种新的H.264整像素运动估计算法和电路结构。该电路支持7种可变块大小,生成41个运动向量。基于该算法和架构实现的IP在45.5MHz工作频率下每秒处理60帧1080HD视频。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
High-performance architecture of H.264 integer-pixel motion estimation IP for real-time 1080HD video CODEC
We propose a new H.264 integer-pixel motion estimation algorithm and circuit architecture to improve the processing speed. The proposed circuit supports 7 kinds of variable block sizes and generates 41 motion vectors. The implemented IP based on the proposed algorithm and architecture processes 60 image frames per second for 1080HD video at the operating frequency of 45.5MHz.
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