{"title":"V.32调制解调器的模拟前端芯片","authors":"J. Roesgen, G. Warren","doi":"10.1109/CICC.1989.56766","DOIUrl":null,"url":null,"abstract":"The design and construction of a complete high-speed modem front end on a single combined analog/digital application-specific integrated circuit are described. The chip is part of a highly integrated modem core created specifically for a family of V.32-based products. It incorporates all of the necessary analog/digital conversion, filtering, and gain control functions. Also included is an adaptive analog echo canceler designed to enhance system performance and reduce circuit complexity in other areas of the chip","PeriodicalId":165054,"journal":{"name":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","volume":"15 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1989-05-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"An analog front end chip for V.32 modems\",\"authors\":\"J. Roesgen, G. Warren\",\"doi\":\"10.1109/CICC.1989.56766\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The design and construction of a complete high-speed modem front end on a single combined analog/digital application-specific integrated circuit are described. The chip is part of a highly integrated modem core created specifically for a family of V.32-based products. It incorporates all of the necessary analog/digital conversion, filtering, and gain control functions. Also included is an adaptive analog echo canceler designed to enhance system performance and reduce circuit complexity in other areas of the chip\",\"PeriodicalId\":165054,\"journal\":{\"name\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"volume\":\"15 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1989-05-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1989 Proceedings of the IEEE Custom Integrated Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/CICC.1989.56766\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1989 Proceedings of the IEEE Custom Integrated Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/CICC.1989.56766","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
The design and construction of a complete high-speed modem front end on a single combined analog/digital application-specific integrated circuit are described. The chip is part of a highly integrated modem core created specifically for a family of V.32-based products. It incorporates all of the necessary analog/digital conversion, filtering, and gain control functions. Also included is an adaptive analog echo canceler designed to enhance system performance and reduce circuit complexity in other areas of the chip
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