650 V高可靠的GaN hemt在硅衬底上的多代:匹配硅CMOS制造指标和过程控制

S. Chowdhury, YiFeng Wu, Likun Shen, Kurt V. Smith, Peter Smith, T. Kikkawa, J. Gritters, L. McCarthy, R. Lal, R. Barr, Zhan Wang, U. Mishra, P. Parikh, T. Hosoda, K. Shono, K. Imanishi, T. Ogino, Akitoshi Mochizuki, K. Kiuchi, Y. Asai
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引用次数: 11

摘要

世界上第一个高可靠的650V GaN HEMT的制造准备就绪,具有高泄漏和导通电阻的工艺能力(CpK>1.6)。该技术是在Si-CMOS兼容的6英寸代工厂中开发的,并已在两代技术节点上展示了超过1000片晶圆的数据,涵盖了在爬坡后认证期间收集的多个产品和封装。采用硅制造工艺,包括无金工艺,避免使用蒸发/提升典型的化合物半导体。GaN工艺的探头良率和线良率现在与在同一制造设备中运行的成熟Si-CMOS工艺相匹配。超出JEDEC标准的扩展认证结果也首次显示在GaN产品上。对cascade配置的产品进行了测试。从光伏逆变器到电动汽车,宽带隙高速高压GaN器件显著减小了系统尺寸,提高了所有电力转换领域的能量转换效率,使上述结果显著,并使GaN的大批量生产成为现实。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
650 V Highly Reliable GaN HEMTs on Si Substrates over Multiple Generations: Matching Silicon CMOS Manufacturing Metrics and Process Control
Manufacturing readiness of the world's first highly reliable 650V GaN HEMT is demonstrated with high process capability (CpK>1.6) for leakage and on resistance. This technology was developed in a Si-CMOS compatible 6-inch foundry and has been demonstrated with over one thousand wafers worth of data spread over two generations of technology nodes covering multiple products and packages collected during ramp up post qualification. Silicon manufacturing processes are employed including gold-free processes that avoid the use of evaporation/liftoff typical to compound semiconductors. Probe yield and Line yield for the GaN process now matches mature Si-CMOS process running in the same fabrication facility. Extended qualification results beyond JEDEC standard are also shown for GaN products for the first time. Products in cascode configuration were tested. Wide bandgap high speed and high voltage GaN devices significantly reduce the system size and improve energy efficiency of power conversion in all areas of electricity conversion, ranging from PV inverters to electric vehicles making the above results significant and making GaN high volume production a reality.
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