一个SOI CMOS LVDS驱动器和接收器对

2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185) Pub Date : 2001-06-14 DOI:10.1109/VLSIC.2001.934224

Brian Young

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引用次数: 13

摘要

一个低压差分信号(LVDS)驱动器和接收器对利用源体绑定的绝缘体上硅CMOS晶体管显示在1 Gb/s数据速率工作，零误码率使用2/sup 31/-1伪随机位序列。驱动器采用带栅极电压保护的移电平器，从薄氧化芯晶体管过渡到DGO输出晶体管。接收器采用并联的fet和NFET双栅氧化物晶体管，使0-2.4 V共模输入成为可能。

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An SOI CMOS LVDS driver and receiver pair

A low-voltage differential signaling (LVDS) driver and receiver pair utilizing source-body-tied silicon-on-insulator CMOS transistors is shown to operate at 1 Gb/s data rates with zero bit error rate using a 2/sup 31/-1 pseudo-random bit sequence. For the driver, a level-shifter with gate voltage protection transitions from thin oxide core transistors to DGO output transistors was used. The receiver uses parallel PFET and NFET dual gate oxide transistors to enable common-mode input from 0-2.4 V.

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2001 Symposium on VLSI Circuits. Digest of Technical Papers (IEEE Cat. No.01CH37185)

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