{"title":"用于QAC UWB接收机的灵活、超低功耗35pJ/脉冲数字后端","authors":"M. Verhelst, W. Dehaene","doi":"10.1109/ESSCIRC.2007.4430287","DOIUrl":null,"url":null,"abstract":"The quadrature analog correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power communication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13 mum CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested flexmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80 MHz with a 0.95 V supply, consumes 35 pJ/pulse. This leads to an energy consumption of 700 pJ/bit, including acquisition overhead, when receiving 2.67 Mbps with 15 pulses per bit.","PeriodicalId":121828,"journal":{"name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A flexible, ultra-low power 35pJ/pulse digital back-end for a QAC UWB receiver\",\"authors\":\"M. Verhelst, W. Dehaene\",\"doi\":\"10.1109/ESSCIRC.2007.4430287\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The quadrature analog correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power communication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13 mum CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested flexmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80 MHz with a 0.95 V supply, consumes 35 pJ/pulse. This leads to an energy consumption of 700 pJ/bit, including acquisition overhead, when receiving 2.67 Mbps with 15 pulses per bit.\",\"PeriodicalId\":121828,\"journal\":{\"name\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2007.4430287\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2007.4430287","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A flexible, ultra-low power 35pJ/pulse digital back-end for a QAC UWB receiver
The quadrature analog correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power communication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13 mum CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested flexmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80 MHz with a 0.95 V supply, consumes 35 pJ/pulse. This leads to an energy consumption of 700 pJ/bit, including acquisition overhead, when receiving 2.67 Mbps with 15 pulses per bit.