用于QAC UWB接收机的灵活、超低功耗35pJ/脉冲数字后端

M. Verhelst, W. Dehaene
{"title":"用于QAC UWB接收机的灵活、超低功耗35pJ/脉冲数字后端","authors":"M. Verhelst, W. Dehaene","doi":"10.1109/ESSCIRC.2007.4430287","DOIUrl":null,"url":null,"abstract":"The quadrature analog correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power communication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13 mum CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested flexmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80 MHz with a 0.95 V supply, consumes 35 pJ/pulse. This leads to an energy consumption of 700 pJ/bit, including acquisition overhead, when receiving 2.67 Mbps with 15 pulses per bit.","PeriodicalId":121828,"journal":{"name":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","volume":"30 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"A flexible, ultra-low power 35pJ/pulse digital back-end for a QAC UWB receiver\",\"authors\":\"M. Verhelst, W. Dehaene\",\"doi\":\"10.1109/ESSCIRC.2007.4430287\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The quadrature analog correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power communication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13 mum CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested flexmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80 MHz with a 0.95 V supply, consumes 35 pJ/pulse. This leads to an energy consumption of 700 pJ/bit, including acquisition overhead, when receiving 2.67 Mbps with 15 pulses per bit.\",\"PeriodicalId\":121828,\"journal\":{\"name\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"volume\":\"30 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-09-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSCIRC.2007.4430287\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"ESSCIRC 2007 - 33rd European Solid-State Circuits Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSCIRC.2007.4430287","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 8

摘要

正交模拟相关(QAC)红外-超宽带接收机是传感器网络中超低功耗通信的理想选择。由于需要高定时精度和灵活性,该UWB接收机的数字后端设计非常具有挑战性。本文介绍了一种0.13 μ m的QAC IR-UWB柔性数字后端的CMOS设计。一种基于嵌套柔性模块的新颖架构,使灵活性和低功耗齐头并进。后端工作在80mhz,电源为0.95 V,功耗为35pj /脉冲。当接收2.67 Mbps,每比特15个脉冲时,这导致700 pJ/bit的能量消耗,包括采集开销。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A flexible, ultra-low power 35pJ/pulse digital back-end for a QAC UWB receiver
The quadrature analog correlating (QAC) IR- UWB receiver is the ideal candidate for ultra-low power communication in sensor networks. The design of the digital back-end of this UWB receiver is very challenging due to the required high timing precision and flexibility. This paper describes a 0.13 mum CMOS design of a QAC IR-UWB flexible digital back-end. A novel architecture, based on nested flexmodules, lets flexibility and low power consumption go hand-in-hand. The back-end, running at 80 MHz with a 0.95 V supply, consumes 35 pJ/pulse. This leads to an energy consumption of 700 pJ/bit, including acquisition overhead, when receiving 2.67 Mbps with 15 pulses per bit.
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:604180095
Book学术官方微信