情境感知的使用变压器的最坏情况执行时间估计

Abderaouf N. Amalou, É. Fromont, I. Puaut
{"title":"情境感知的使用变压器的最坏情况执行时间估计","authors":"Abderaouf N. Amalou, É. Fromont, I. Puaut","doi":"10.4230/LIPIcs.ECRTS.2023.7","DOIUrl":null,"url":null,"abstract":"This paper presents CAWET, a hybrid worst-case program timing estimation technique. CAWET identifies the longest execution path using static techniques, whereas the worst-case execution time (WCET) of basic blocks is predicted using an advanced language processing technique called Transformer-XL. By employing Transformers-XL in CAWET, the execution context formed by previously executed basic blocks is taken into account, allowing for consideration of the micro-architecture of the processor pipeline without explicit modeling. Through a series of experiments on the TacleBench benchmarks, using different target processors (Arm Cortex M4, M7, and A53), our method is demonstrated to never underestimate WCETs and is shown to be less pessimistic than its competitors. 2012 ACM","PeriodicalId":191379,"journal":{"name":"Euromicro Conference on Real-Time Systems","volume":"55 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"CAWET: Context-Aware Worst-Case Execution Time Estimation Using Transformers\",\"authors\":\"Abderaouf N. Amalou, É. Fromont, I. Puaut\",\"doi\":\"10.4230/LIPIcs.ECRTS.2023.7\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper presents CAWET, a hybrid worst-case program timing estimation technique. CAWET identifies the longest execution path using static techniques, whereas the worst-case execution time (WCET) of basic blocks is predicted using an advanced language processing technique called Transformer-XL. By employing Transformers-XL in CAWET, the execution context formed by previously executed basic blocks is taken into account, allowing for consideration of the micro-architecture of the processor pipeline without explicit modeling. Through a series of experiments on the TacleBench benchmarks, using different target processors (Arm Cortex M4, M7, and A53), our method is demonstrated to never underestimate WCETs and is shown to be less pessimistic than its competitors. 2012 ACM\",\"PeriodicalId\":191379,\"journal\":{\"name\":\"Euromicro Conference on Real-Time Systems\",\"volume\":\"55 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Euromicro Conference on Real-Time Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.4230/LIPIcs.ECRTS.2023.7\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Euromicro Conference on Real-Time Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.4230/LIPIcs.ECRTS.2023.7","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 0

摘要

本文提出了一种混合最坏情况程序时序估计技术CAWET。CAWET使用静态技术确定最长的执行路径,而使用称为Transformer-XL的高级语言处理技术预测基本块的最坏情况执行时间(WCET)。通过在CAWET中使用transformer - xl,考虑了先前执行的基本块形成的执行上下文,允许在不显式建模的情况下考虑处理器管道的微体系结构。通过在TacleBench基准测试上进行的一系列实验,使用不同的目标处理器(Arm Cortex M4, M7和A53),我们的方法被证明永远不会低估wcet,并且比其竞争对手更不悲观。2012年ACM
本文章由计算机程序翻译,如有差异,请以英文原文为准。
CAWET: Context-Aware Worst-Case Execution Time Estimation Using Transformers
This paper presents CAWET, a hybrid worst-case program timing estimation technique. CAWET identifies the longest execution path using static techniques, whereas the worst-case execution time (WCET) of basic blocks is predicted using an advanced language processing technique called Transformer-XL. By employing Transformers-XL in CAWET, the execution context formed by previously executed basic blocks is taken into account, allowing for consideration of the micro-architecture of the processor pipeline without explicit modeling. Through a series of experiments on the TacleBench benchmarks, using different target processors (Arm Cortex M4, M7, and A53), our method is demonstrated to never underestimate WCETs and is shown to be less pessimistic than its competitors. 2012 ACM
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信