{"title":"用于3G无线芯片组的电源管理/模拟基带IC的SoC集成挑战","authors":"D. Evans, M. McConnell, P. Kawamura, L. Krug","doi":"10.1109/WCT.2004.239807","DOIUrl":null,"url":null,"abstract":"An integrated power management/analog baseband integrated circuit has been developed in 0.35 /spl mu/m CMOS technology. The IC features multiple low-dropout (LDO) linear voltage regulators, power switches, DC/DC switching converters, a voice band CODEC, and WCDMA and GSM baseband converters all sharing the same substrate. This paper examines the design challenges associated with power management and analog baseband system on a chip (SoC) integration. Optimal floorplanning, power device isolation, shielding, power distribution, reference generation, and noise reduction strategies and techniques are discussed.","PeriodicalId":303825,"journal":{"name":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","volume":"13 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"16","resultStr":"{\"title\":\"SoC integration challenges for a power management/analog baseband IC for 3G wireless chipsets\",\"authors\":\"D. Evans, M. McConnell, P. Kawamura, L. Krug\",\"doi\":\"10.1109/WCT.2004.239807\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An integrated power management/analog baseband integrated circuit has been developed in 0.35 /spl mu/m CMOS technology. The IC features multiple low-dropout (LDO) linear voltage regulators, power switches, DC/DC switching converters, a voice band CODEC, and WCDMA and GSM baseband converters all sharing the same substrate. This paper examines the design challenges associated with power management and analog baseband system on a chip (SoC) integration. Optimal floorplanning, power device isolation, shielding, power distribution, reference generation, and noise reduction strategies and techniques are discussed.\",\"PeriodicalId\":303825,\"journal\":{\"name\":\"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs\",\"volume\":\"13 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-05-24\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"16\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/WCT.2004.239807\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2004 Proceedings of the 16th International Symposium on Power Semiconductor Devices and ICs","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/WCT.2004.239807","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
SoC integration challenges for a power management/analog baseband IC for 3G wireless chipsets
An integrated power management/analog baseband integrated circuit has been developed in 0.35 /spl mu/m CMOS technology. The IC features multiple low-dropout (LDO) linear voltage regulators, power switches, DC/DC switching converters, a voice band CODEC, and WCDMA and GSM baseband converters all sharing the same substrate. This paper examines the design challenges associated with power management and analog baseband system on a chip (SoC) integration. Optimal floorplanning, power device isolation, shielding, power distribution, reference generation, and noise reduction strategies and techniques are discussed.
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