CMOS工艺流程中的零成本MTP高密度NVM模块

A. Atrash, G. Cassuto, W. Chen, V. Dayan, O. Galzur, M. Gutman, A. Heiman, G. Hunsinger, D. Nahmad, A. Parag, E. Pikhay, Y. Roizin, B. Smith, A. Strum, T. Tishbi, R. Teggatz
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引用次数: 7

摘要

提出了一种具有广泛统计验证的零成本嵌入式高密度MTP NVM。从64位到64kbit的紧凑单Poly模块系列基于Y-Flash概念,采用原始阵列架构,并在标准和电源管理(PM) 0.18um CMOS工艺流程中实现。没有使用特殊的高压装置或额外的面罩。卓越的可靠性性能,允许超过10k的程序/擦除周期和在150°C下10年的数据保留。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Zero-cost MTP high density NVM modules in a CMOS process flow
A zero-cost embedded high density MTP NVM with extensive statistical verification is presented. The family of compact single Poly modules ranging from 64bit to 64kbit is based on the Y-Flash concept, employing original array architectures and implemented in standard and power management (PM) 0.18um CMOS process flows. No special HV devices or additional masks are employed. Excellent reliability performance allowing more than 10k program/erase cycles and 10year data retention at 150°C is demonstrated.
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