{"title":"自定时系统完井检测的当前传感方法","authors":"L. Nagy, V. Stopjaková","doi":"10.1109/DDECS.2011.5783123","DOIUrl":null,"url":null,"abstract":"This paper addresses an alternative approach in detecting completion of computation in asynchronous circuits. The proposed method is based on sensing the amount of consumed power supply current. It represents a simple but reliable and effective way of detecting the computation completion in this type of digital systems. The paper presents a novel topology of current sensing circuitry, explanation of the operation as well as simulation results and finally the conclusion.","PeriodicalId":231389,"journal":{"name":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","volume":"43 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2011-04-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Current sensing methodology for completion detection in self-timed systems\",\"authors\":\"L. Nagy, V. Stopjaková\",\"doi\":\"10.1109/DDECS.2011.5783123\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper addresses an alternative approach in detecting completion of computation in asynchronous circuits. The proposed method is based on sensing the amount of consumed power supply current. It represents a simple but reliable and effective way of detecting the computation completion in this type of digital systems. The paper presents a novel topology of current sensing circuitry, explanation of the operation as well as simulation results and finally the conclusion.\",\"PeriodicalId\":231389,\"journal\":{\"name\":\"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems\",\"volume\":\"43 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2011-04-13\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DDECS.2011.5783123\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DDECS.2011.5783123","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Current sensing methodology for completion detection in self-timed systems
This paper addresses an alternative approach in detecting completion of computation in asynchronous circuits. The proposed method is based on sensing the amount of consumed power supply current. It represents a simple but reliable and effective way of detecting the computation completion in this type of digital systems. The paper presents a novel topology of current sensing circuitry, explanation of the operation as well as simulation results and finally the conclusion.