Ghavam G. Shahidi, A. Ajmera, Fariborz Assaderaghi, R. Bolam, Andres Bryant, M. Coffey, H. Hovel, J. Lasky, E. Leobandung, H.-S. Lo, M. Maloney, D. Moy, Werner A. Rausch, D. Sadana, Dominic J. Schepis, M. Sherony, J. Sleight, Lawrence F. Wagner, K. Wu, Bijan Davari, T. Chen
{"title":"SOI技术主流化","authors":"Ghavam G. Shahidi, A. Ajmera, Fariborz Assaderaghi, R. Bolam, Andres Bryant, M. Coffey, H. Hovel, J. Lasky, E. Leobandung, H.-S. Lo, M. Maloney, D. Moy, Werner A. Rausch, D. Sadana, Dominic J. Schepis, M. Sherony, J. Sleight, Lawrence F. Wagner, K. Wu, Bijan Davari, T. Chen","doi":"10.1109/SOI.1999.819828","DOIUrl":null,"url":null,"abstract":"Partially-depleted deep sub-micron CMOS on SOI technology is becoming a mainstream technology. This technology offers 20-35% performance gain over a bulk technology implemented with the same lithography. In this paper, the challenges of mainstreaming the SOI technology in device, material, technology and circuit terms are described.","PeriodicalId":117832,"journal":{"name":"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)","volume":"110 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"14","resultStr":"{\"title\":\"Mainstreaming of the SOI technology\",\"authors\":\"Ghavam G. Shahidi, A. Ajmera, Fariborz Assaderaghi, R. Bolam, Andres Bryant, M. Coffey, H. Hovel, J. Lasky, E. Leobandung, H.-S. Lo, M. Maloney, D. Moy, Werner A. Rausch, D. Sadana, Dominic J. Schepis, M. Sherony, J. Sleight, Lawrence F. Wagner, K. Wu, Bijan Davari, T. Chen\",\"doi\":\"10.1109/SOI.1999.819828\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Partially-depleted deep sub-micron CMOS on SOI technology is becoming a mainstream technology. This technology offers 20-35% performance gain over a bulk technology implemented with the same lithography. In this paper, the challenges of mainstreaming the SOI technology in device, material, technology and circuit terms are described.\",\"PeriodicalId\":117832,\"journal\":{\"name\":\"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)\",\"volume\":\"110 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"14\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/SOI.1999.819828\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1999 IEEE International SOI Conference. Proceedings (Cat. No.99CH36345)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/SOI.1999.819828","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Partially-depleted deep sub-micron CMOS on SOI technology is becoming a mainstream technology. This technology offers 20-35% performance gain over a bulk technology implemented with the same lithography. In this paper, the challenges of mainstreaming the SOI technology in device, material, technology and circuit terms are described.