并行求和对数放大器的非理想性分析

2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS) Pub Date : 2016-12-01 DOI:10.1109/ICECS.2016.7841262

J. L. Ausín, J. Ramos, J. F. Duque-Carrillo, G. Torelli

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引用次数: 1

摘要

基于分段线性逼近的CMOS对数放大器通常在假设理想条件下进行分析和设计。本文讨论了在传感应用中对高精度对数放大器性能起关键作用的所用元件中的非理想因素，并表明使用简化的数学模型可能会导致错误的结论。提出了一种宽动态范围、低功耗的增益失配补偿方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

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Analysis of non-idealities in parallel-summation logarithmic amplifiers

CMOS logarithmic amplifiers based on piecewise linear approximation have been usually analyzed and designed by assuming ideal conditions. This paper discusses non-ideal factors in the used components, which play a key role in the performance of high-accuracy logarithmic amplifiers for sensing applications, and shows that the use of simplified mathematical models may lead to wrong conclusions. A gain-mismatch compensation method that enables wide dynamic range and low-power operation is also outlined.

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2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS)

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