{"title":"高速异步Turbo解码器的设计","authors":"P. Golani, G. Dimou, M. Prakash, P. Beerel","doi":"10.1109/ASYNC.2007.16","DOIUrl":null,"url":null,"abstract":"This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-performance error correction codes used in applications where maximal information transfer is needed over a limited-bandwidth communication link in the presence of data corrupting noise. Specifically we designed an asynchronous high-speed turbo decoder that can be potentially used for new wireless communications protocols with close to OC-12 throughputs. The design has been implemented using a new static single-track-full-buffer (SSTFB) standard cell library in IBM 0.18 mum technology that provides low latency, fast cycle-time, and more robustness to noise than previously studied single-track full-buffer technology (STFB). A high-speed synchronous counterpart using the same high-speed architecture is designed in the same technology for comparison. The results demonstrate that for a variety of network constraints, the asynchronous design provides advantages in throughput per area. Moreover, the asynchronous design can support very low-latency network constraints not achievable with the synchronous alternative.","PeriodicalId":136595,"journal":{"name":"13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)","volume":"93 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2007-03-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"Design of a High-Speed Asynchronous Turbo Decoder\",\"authors\":\"P. Golani, G. Dimou, M. Prakash, P. Beerel\",\"doi\":\"10.1109/ASYNC.2007.16\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-performance error correction codes used in applications where maximal information transfer is needed over a limited-bandwidth communication link in the presence of data corrupting noise. Specifically we designed an asynchronous high-speed turbo decoder that can be potentially used for new wireless communications protocols with close to OC-12 throughputs. The design has been implemented using a new static single-track-full-buffer (SSTFB) standard cell library in IBM 0.18 mum technology that provides low latency, fast cycle-time, and more robustness to noise than previously studied single-track full-buffer technology (STFB). A high-speed synchronous counterpart using the same high-speed architecture is designed in the same technology for comparison. The results demonstrate that for a variety of network constraints, the asynchronous design provides advantages in throughput per area. Moreover, the asynchronous design can support very low-latency network constraints not achievable with the synchronous alternative.\",\"PeriodicalId\":136595,\"journal\":{\"name\":\"13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)\",\"volume\":\"93 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2007-03-12\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ASYNC.2007.16\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"13th IEEE International Symposium on Asynchronous Circuits and Systems (ASYNC'07)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ASYNC.2007.16","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
This paper explores the advantages of high performance asynchronous circuits in a semi-custom standard cell environment for high-throughput turbo coding. Turbo codes are high-performance error correction codes used in applications where maximal information transfer is needed over a limited-bandwidth communication link in the presence of data corrupting noise. Specifically we designed an asynchronous high-speed turbo decoder that can be potentially used for new wireless communications protocols with close to OC-12 throughputs. The design has been implemented using a new static single-track-full-buffer (SSTFB) standard cell library in IBM 0.18 mum technology that provides low latency, fast cycle-time, and more robustness to noise than previously studied single-track full-buffer technology (STFB). A high-speed synchronous counterpart using the same high-speed architecture is designed in the same technology for comparison. The results demonstrate that for a variety of network constraints, the asynchronous design provides advantages in throughput per area. Moreover, the asynchronous design can support very low-latency network constraints not achievable with the synchronous alternative.