{"title":"双全球流","authors":"R. Damiano, Len Berman","doi":"10.1109/ICCD.1991.139842","DOIUrl":null,"url":null,"abstract":"A combinatorial logic optimization is described. The optimization is (in some sense) a dual of earlier global flow optimizations. The optimization leaves the function carried by each signal in the circuit unchanged and thus avoids expensive recomputation of don't care information. The results of experiments performed to evaluate this optimization are also described.<<ETX>>","PeriodicalId":239827,"journal":{"name":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","volume":"9 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-10-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"Dual global flow\",\"authors\":\"R. Damiano, Len Berman\",\"doi\":\"10.1109/ICCD.1991.139842\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A combinatorial logic optimization is described. The optimization is (in some sense) a dual of earlier global flow optimizations. The optimization leaves the function carried by each signal in the circuit unchanged and thus avoids expensive recomputation of don't care information. The results of experiments performed to evaluate this optimization are also described.<<ETX>>\",\"PeriodicalId\":239827,\"journal\":{\"name\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"volume\":\"9 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-10-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICCD.1991.139842\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991 Proceedings] IEEE International Conference on Computer Design: VLSI in Computers and Processors","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICCD.1991.139842","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A combinatorial logic optimization is described. The optimization is (in some sense) a dual of earlier global flow optimizations. The optimization leaves the function carried by each signal in the circuit unchanged and thus avoids expensive recomputation of don't care information. The results of experiments performed to evaluate this optimization are also described.<>