人工神经网络二维多速率收缩阵列设计

E. Khan, N. Ling
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引用次数: 2

摘要

本文提出了一种基于二维收缩阵列的神经网络设计方法。设计中采用了两种技术,即二维流水线和多速率处理(2级时钟)。与目前已知的一维和二维收缩实现方案相比,二维流水线操作在计算时间上有显著改善。此外,使用多速率时钟,使权重(突触)可以以远高于激活电压的速率传输和传递,以实现最大的阵列吞吐量,并消除许多阵列(包括收缩)设计中存在的全局互连(从而减少同步和传播延迟问题)。这种传递权值的方案还可以显著节省面积,因为可以减少权值的本地存储面积。该设计已应用于Hopfield神经网络的实现。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Two-dimensional multirate systolic array design for artificial neural networks
In this paper a novel design of neural networks using 2-dimensional systolic array is proposed. Two techniques are applied in the design, namely, 2-dimensional pipelining and multirate processing (2 level clocking). 2-dimensional pipelining operation gives significant improvement in computation time compared to the currently known 1D and 2D systolic implementation schemes. Besides, multirate clocking is used so that weights (synapses) can be transmitted and passed systolically in a rate much higher than activation voltages, to achieve maximum array throughput and to eliminate global interconnections present in many array (including systolic) designs (thus reducing synchronization and propagation delay problems). This scheme of passing weights also saves area significantly since local storage area for the weights can be reduced. The design is applied to the implementation of a Hopfield neural net.<>
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