{"title":"微处理器:验证、调试和测试","authors":"Sunil R. Shenoy","doi":"10.1109/HLDVT.2009.5340187","DOIUrl":null,"url":null,"abstract":"I will discuss the use of high level design and abstraction for modeling, simulation and validation of leadership microprocessors, the challenges we have faced in this domain, our learnings and our vision and strategy for the future.","PeriodicalId":204520,"journal":{"name":"High Level Design Validation and Test Workshop","volume":"506 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2009-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Leadership Microprocessors: Validation, debug and test\",\"authors\":\"Sunil R. Shenoy\",\"doi\":\"10.1109/HLDVT.2009.5340187\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"I will discuss the use of high level design and abstraction for modeling, simulation and validation of leadership microprocessors, the challenges we have faced in this domain, our learnings and our vision and strategy for the future.\",\"PeriodicalId\":204520,\"journal\":{\"name\":\"High Level Design Validation and Test Workshop\",\"volume\":\"506 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2009-11-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"High Level Design Validation and Test Workshop\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/HLDVT.2009.5340187\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"High Level Design Validation and Test Workshop","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/HLDVT.2009.5340187","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Leadership Microprocessors: Validation, debug and test
I will discuss the use of high level design and abstraction for modeling, simulation and validation of leadership microprocessors, the challenges we have faced in this domain, our learnings and our vision and strategy for the future.
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