{"title":"模拟阵列处理器","authors":"B. Gilbert","doi":"10.1109/ISSCC.1984.1156589","DOIUrl":null,"url":null,"abstract":"A fully-parallel 16-channel analog array processor for concurrent signal normalization in pattern recognition applications will be described. Using a standard monolithic bipolar process the chip consumes 1mW, provides a 1MHz bandwidth and unlimited channel-expansion facilities.","PeriodicalId":260117,"journal":{"name":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"4 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"An analog array processor\",\"authors\":\"B. Gilbert\",\"doi\":\"10.1109/ISSCC.1984.1156589\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A fully-parallel 16-channel analog array processor for concurrent signal normalization in pattern recognition applications will be described. Using a standard monolithic bipolar process the chip consumes 1mW, provides a 1MHz bandwidth and unlimited channel-expansion facilities.\",\"PeriodicalId\":260117,\"journal\":{\"name\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"4 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1984.1156589\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1984 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1984.1156589","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A fully-parallel 16-channel analog array processor for concurrent signal normalization in pattern recognition applications will be described. Using a standard monolithic bipolar process the chip consumes 1mW, provides a 1MHz bandwidth and unlimited channel-expansion facilities.