{"title":"FPGA可重构计算工具挑战:访问SRAM设计示例","authors":"M. Nakkar","doi":"10.1109/ICTEA.2012.6462879","DOIUrl":null,"url":null,"abstract":"Simplification of the hardware part of digital design adds complicity to the software tools. In addition, the details of physical hardware wiring, timing, and models' specifications are being illuminated in so many new versions of CAD software. This adds challenges for new designers especially for those in educational institutes. The issue of complex design tools has never been addressed in literature despite its importance. The focus of this paper is, briefly, presenting some of the challenges faced by graduate and new System-on-Chip (SOC) designers. A reconfigurable design example of accessing an off-chip SRAM on the Altera DE2 board is presented. The software/hardware co-design difficulties are listed along with proposed solutions.","PeriodicalId":245530,"journal":{"name":"2012 2nd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"1","resultStr":"{\"title\":\"Reconfigurable computing FPGA tools challenges: accessing SRAM design example\",\"authors\":\"M. Nakkar\",\"doi\":\"10.1109/ICTEA.2012.6462879\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Simplification of the hardware part of digital design adds complicity to the software tools. In addition, the details of physical hardware wiring, timing, and models' specifications are being illuminated in so many new versions of CAD software. This adds challenges for new designers especially for those in educational institutes. The issue of complex design tools has never been addressed in literature despite its importance. The focus of this paper is, briefly, presenting some of the challenges faced by graduate and new System-on-Chip (SOC) designers. A reconfigurable design example of accessing an off-chip SRAM on the Altera DE2 board is presented. The software/hardware co-design difficulties are listed along with proposed solutions.\",\"PeriodicalId\":245530,\"journal\":{\"name\":\"2012 2nd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA)\",\"volume\":\"8 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2012-12-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"1\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2012 2nd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICTEA.2012.6462879\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2012 2nd International Conference on Advances in Computational Tools for Engineering Applications (ACTEA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICTEA.2012.6462879","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Reconfigurable computing FPGA tools challenges: accessing SRAM design example
Simplification of the hardware part of digital design adds complicity to the software tools. In addition, the details of physical hardware wiring, timing, and models' specifications are being illuminated in so many new versions of CAD software. This adds challenges for new designers especially for those in educational institutes. The issue of complex design tools has never been addressed in literature despite its importance. The focus of this paper is, briefly, presenting some of the challenges faced by graduate and new System-on-Chip (SOC) designers. A reconfigurable design example of accessing an off-chip SRAM on the Altera DE2 board is presented. The software/hardware co-design difficulties are listed along with proposed solutions.