面向无线医疗服务的区域和性能感知心电编码器设计

Bharat Garg, Sameer Yadav, G. K. Sharma
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引用次数: 2

摘要

现代可穿戴设备需要低功耗、高性能的医疗信号监测,以实现高效、可靠的医疗服务。用于诊断心脏疾病的心电图信号需要24小时监测。高效的VLSI实现无损心电编码器是无线医疗服务的关键要求。本文提出了一种利用单级霍夫曼表提供压缩心电数据的面积高效、高性能无损心电编码器。在所提出的心电编码器结构中,低范围的心电数据通过小霍夫曼表进行编码,而超出范围的数据则被分割为上下部分。这些上下部分在两个连续的时钟周期中由相同的霍夫曼表编码。该体系结构在MATLAB中实现,并用MIT-BIH心律失常数据库进行仿真。仿真结果表明,与现有的心电编码器相比,该编码器的压缩率提高了72.87%。为了评估硬件效率,编码器在Verilog中实现,并使用90nm PDK在Synopsys Design Compiler中合成。结果表明,与现有编码器相比,该编码器占地面积减少了12.11%,性能提高了2.1倍。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
An area and performance aware ECG encoder design for wireless healthcare services
Modern wearable devices demand low power high performance medical signal monitoring to achieve efficient and reliable health-care services. The electrocardiogram (ECG) signal which is used to diagnose heart diseases requires 24 hour monitoring. Efficient VLSI implementation of lossless ECG encoder is the critical requirement in wireless health care services. This paper presents an area efficient and high performance lossless ECG encoder that utilizes a single stage Huffman table to provide compressed ECG data. In the proposed ECG encoder architecture, low range of ECG data is encoded via small Huffman table whereas out of range data is segmented into upper and lower parts. These upper and lower parts are encoded by the same Huffman table in the two consecutive clock cycles. This architecture is implemented in MATLAB and simulated with MIT-BIH Arrhythmia database. The simulation results of the proposed ECG encoder show 72.87% more compression over the existing ECG encoder. To evaluate the hardware efficiency, the encoder is implemented in Verilog and synthesized with Synopsys Design Compiler using 90nm PDK. The results show that proposed encoder requires 12.11% less area and provides 2.1X improved performance over the existing encoder.
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