{"title":"用于大规模集成电路的逻辑模拟器","authors":"J. Armstrong, D. E. Devlin","doi":"10.1109/DAC.1981.1585405","DOIUrl":null,"url":null,"abstract":"A general simulation program for LSI devices is described. The program provides functional simulation capability as well as the ability to simulate chip interface timing. Chip modeling utilizes chip input/output specifications and timing diagrams. Construction and coding of the model is a process very much akin to assembly language programming. GSP is a program suitable for the simulation of LSI devices as it allows for a manageable amount of detail in model descriptions and can simulate with an efficiency that is adequate for system validation activities.","PeriodicalId":201443,"journal":{"name":"18th Design Automation Conference","volume":"116 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1981-06-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"GSP: A Logic Simulator for LSI\",\"authors\":\"J. Armstrong, D. E. Devlin\",\"doi\":\"10.1109/DAC.1981.1585405\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A general simulation program for LSI devices is described. The program provides functional simulation capability as well as the ability to simulate chip interface timing. Chip modeling utilizes chip input/output specifications and timing diagrams. Construction and coding of the model is a process very much akin to assembly language programming. GSP is a program suitable for the simulation of LSI devices as it allows for a manageable amount of detail in model descriptions and can simulate with an efficiency that is adequate for system validation activities.\",\"PeriodicalId\":201443,\"journal\":{\"name\":\"18th Design Automation Conference\",\"volume\":\"116 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1981-06-29\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"18th Design Automation Conference\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/DAC.1981.1585405\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"18th Design Automation Conference","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/DAC.1981.1585405","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A general simulation program for LSI devices is described. The program provides functional simulation capability as well as the ability to simulate chip interface timing. Chip modeling utilizes chip input/output specifications and timing diagrams. Construction and coding of the model is a process very much akin to assembly language programming. GSP is a program suitable for the simulation of LSI devices as it allows for a manageable amount of detail in model descriptions and can simulate with an efficiency that is adequate for system validation activities.
求助内容：
应助结果提醒方式：
京公网安备 11010802042870号
