{"title":"基于块压缩和双邻接侧通道路由器的构建块布局","authors":"S. Yamada, H. Tanabe","doi":"10.1109/GLSV.1991.143971","DOIUrl":null,"url":null,"abstract":"The authors propose a new layout method based on a block compaction and two-adjacent-side channel router for building block VLSI. In this method, the block compaction and global routing are carried out simultaneously and by introducing a new channel router it is possible to avoid unnecessary detour of the wires and reduce the dead space. The present channel routing approach has a remarkable feature that its routability is 100%. Experimental results are shown to compare this method with the previous method.<<ETX>>","PeriodicalId":261873,"journal":{"name":"[1991] Proceedings. First Great Lakes Symposium on VLSI","volume":"71 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1991-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Building block layout based on block compaction and two-adjacent-side channel router\",\"authors\":\"S. Yamada, H. Tanabe\",\"doi\":\"10.1109/GLSV.1991.143971\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The authors propose a new layout method based on a block compaction and two-adjacent-side channel router for building block VLSI. In this method, the block compaction and global routing are carried out simultaneously and by introducing a new channel router it is possible to avoid unnecessary detour of the wires and reduce the dead space. The present channel routing approach has a remarkable feature that its routability is 100%. Experimental results are shown to compare this method with the previous method.<<ETX>>\",\"PeriodicalId\":261873,\"journal\":{\"name\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"volume\":\"71 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1991-03-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"[1991] Proceedings. First Great Lakes Symposium on VLSI\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/GLSV.1991.143971\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"[1991] Proceedings. First Great Lakes Symposium on VLSI","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/GLSV.1991.143971","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Building block layout based on block compaction and two-adjacent-side channel router
The authors propose a new layout method based on a block compaction and two-adjacent-side channel router for building block VLSI. In this method, the block compaction and global routing are carried out simultaneously and by introducing a new channel router it is possible to avoid unnecessary detour of the wires and reduce the dead space. The present channel routing approach has a remarkable feature that its routability is 100%. Experimental results are shown to compare this method with the previous method.<>