L. Hongming, Huaqiang Wu, Jinbiao Liu, J. Niu, Yu Jiahan, Can Huang, Junfeng Li, Qiuxia Xu, Xiao-Shan Wu, H. Qian
{"title":"单片石墨烯倍频器工作在10GHz范围","authors":"L. Hongming, Huaqiang Wu, Jinbiao Liu, J. Niu, Yu Jiahan, Can Huang, Junfeng Li, Qiuxia Xu, Xiao-Shan Wu, H. Qian","doi":"10.1109/VLSI-TSA.2014.6839669","DOIUrl":null,"url":null,"abstract":"A high-performance monolithically integrated graphene frequency multiplier working at 10 GHz range is demonstrated with novel implementation method. A CMOS compatible two-layer-routing process is proposed to fabricate passive elements, interconnects and buried gate/source/drain regions on 8\" wafers. This is followed by large-scale monolayer graphene transfer to form graphene ICs. The frequency multiplier circuit features a 3dB bandwidth of record high 4GHz. The conversion gain reaches -26dB.","PeriodicalId":403085,"journal":{"name":"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2014-04-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"6","resultStr":"{\"title\":\"Monolithic graphene frequency multiplier working at 10GHz range\",\"authors\":\"L. Hongming, Huaqiang Wu, Jinbiao Liu, J. Niu, Yu Jiahan, Can Huang, Junfeng Li, Qiuxia Xu, Xiao-Shan Wu, H. Qian\",\"doi\":\"10.1109/VLSI-TSA.2014.6839669\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A high-performance monolithically integrated graphene frequency multiplier working at 10 GHz range is demonstrated with novel implementation method. A CMOS compatible two-layer-routing process is proposed to fabricate passive elements, interconnects and buried gate/source/drain regions on 8\\\" wafers. This is followed by large-scale monolayer graphene transfer to form graphene ICs. The frequency multiplier circuit features a 3dB bandwidth of record high 4GHz. The conversion gain reaches -26dB.\",\"PeriodicalId\":403085,\"journal\":{\"name\":\"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2014-04-28\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"6\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSI-TSA.2014.6839669\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of Technical Program - 2014 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSI-TSA.2014.6839669","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Monolithic graphene frequency multiplier working at 10GHz range
A high-performance monolithically integrated graphene frequency multiplier working at 10 GHz range is demonstrated with novel implementation method. A CMOS compatible two-layer-routing process is proposed to fabricate passive elements, interconnects and buried gate/source/drain regions on 8" wafers. This is followed by large-scale monolayer graphene transfer to form graphene ICs. The frequency multiplier circuit features a 3dB bandwidth of record high 4GHz. The conversion gain reaches -26dB.