平铺重叠子阵列的误差分析

T. Azar
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引用次数: 0

摘要

在设计大型相控阵时,通常是设计和构建一个基本的构建块,或瓦片,并使用重复的瓦片来构建最终的阵列。这种方法在连续和重叠的子数组中都很重要。在带状线技术中,瓷砖由顶层的几个元素的子阵列组成,然后是下层的波束形成器。线路弯曲、阻抗变压器和相邻线路之间的相互耦合会导致单个辐射元件的幅值和相位分布出现误差。这些误差会导致相控阵中的其他误差,如旁瓣电平和指向性。本文综述了阵列理论在连续子阵列和重叠子阵列中的应用。它还提供了一种方法来帮助数组设计人员区分瓦片内的错误和瓦片之间交叉引起的其他错误。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
Error analysis of tiled overlapped subarrays
In designing large phased arrays, it is common to design and construct a basic building block, or tile, and use duplicate tiles to build the final array. This method is important in both contiguous and overlapped subarrays. In stripline technology, the tile consists of a subarray of several elements on the top layer followed by the beamformer on the lower layers. Line bends, impedance transformers, and mutual coupling between adjacent lines can cause errors in the amplitude and phase distribution to the individual radiating elements. These errors can lead to other errors in phased arrays such as sidelobe levels and directivity. This paper presents a review of array theory as applied to both contiguous and overlapped subarrays. It also presents a method to help array designers differentiate between errors within the tile and others caused by crossovers between tiles.
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