N. McKay, T. Melham, Kong Woei Susanto, Satnam Singh
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Dynamic specialisation of XC6200 FPGAs by partial evaluation
We describe preliminary results of dynamically specialising Xilinx XC6200 FPGA circuits using the partial evaluation method. This method provides a systematic way to manage the complexity of dynamic reconfiguration in the special case where a general circuit is specialised with respect to a slowly changing input. We describe how we address the verification and run-time support issues which are raised when one modifies a circuit at run-time.