A high throughput CMP process by using an Epic ECR directional ion source for intermetal dielectric

Wafer fabrication technology is rapidly advancing toward four or five layers of metallization with geometries of 0.35 /spl mu/m and smaller, aspect ratios of 3:1, and a requirement that the intermetal dielectric be globally planarized. Epic's ECR Directional Ion Source combined with in situ sputter etch has been demonstrated repeatedly to fill 3:1 high aspect ratio gaps at 0.25 /spl mu/m gap widths. The superior silane-based oxide does not absorb moisture over an extended period of time. The void-free gap fill in IMD provides the foundation for CMP because no slurry will be left in the IMD to cause reliability problems. The simultaneous deposition and etch step enhance the build-up of IMD over the lower valley on the device wafers. Thus IMD deposited by Epic exhibits a better planarity on the deposited wafer. The wafer topography after ECR deposition exhibits a unique surface that has only small peaks and step structures. These structures are easily removed by the CMP process. The increase in CMP throughput can be over 33%. The shortened polishing time helps the stability and repeatability of the CMP process.