基于FPGA的TVP5150控制器设计

IEEE Conference Anthology Pub Date : 1900-01-01 DOI:10.1109/ANTHOLOGY.2013.6784942

Juan Li, Yan-ying Liu

{"title":"基于FPGA的TVP5150控制器设计","authors":"Juan Li, Yan-ying Liu","doi":"10.1109/ANTHOLOGY.2013.6784942","DOIUrl":null,"url":null,"abstract":"In this paper, a design of TVP5150 controller based on FPGA (Field Programmable Gate Array) is proposed. This design uses the series of VIRTEX-4 XC4VSX25 chip to control the video decoder TVP5150. FPGA initialized video decoder TVP5150 via IIC bus standard. In order to decode the video data, the input channel, working state and the output data format of TVP5150 should be configured. In this paper, it describes the method of initializing TVP5150 through FPGA based on IIC bus. And then, introduce the format of ITU-R BT.656 of the output video data and the way of extracting the available data from ITU-R BT.656.","PeriodicalId":203169,"journal":{"name":"IEEE Conference Anthology","volume":"25 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Design of TVP5150 controller based on FPGA\",\"authors\":\"Juan Li, Yan-ying Liu\",\"doi\":\"10.1109/ANTHOLOGY.2013.6784942\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"In this paper, a design of TVP5150 controller based on FPGA (Field Programmable Gate Array) is proposed. This design uses the series of VIRTEX-4 XC4VSX25 chip to control the video decoder TVP5150. FPGA initialized video decoder TVP5150 via IIC bus standard. In order to decode the video data, the input channel, working state and the output data format of TVP5150 should be configured. In this paper, it describes the method of initializing TVP5150 through FPGA based on IIC bus. And then, introduce the format of ITU-R BT.656 of the output video data and the way of extracting the available data from ITU-R BT.656.\",\"PeriodicalId\":203169,\"journal\":{\"name\":\"IEEE Conference Anthology\",\"volume\":\"25 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"IEEE Conference Anthology\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ANTHOLOGY.2013.6784942\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"IEEE Conference Anthology","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ANTHOLOGY.2013.6784942","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

本文提出了一种基于现场可编程门阵列(FPGA)的TVP5150控制器设计方案。本设计采用VIRTEX-4系列XC4VSX25芯片对视频解码器TVP5150进行控制。FPGA通过IIC总线标准初始化视频解码器TVP5150。为了对视频数据进行解码，需要配置TVP5150的输入通道、工作状态和输出数据格式。本文介绍了基于IIC总线的FPGA对TVP5150进行初始化的方法。然后，介绍了输出视频数据的ITU-R BT.656格式以及从ITU-R BT.656中提取可用数据的方法。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

Design of TVP5150 controller based on FPGA

In this paper, a design of TVP5150 controller based on FPGA (Field Programmable Gate Array) is proposed. This design uses the series of VIRTEX-4 XC4VSX25 chip to control the video decoder TVP5150. FPGA initialized video decoder TVP5150 via IIC bus standard. In order to decode the video data, the input channel, working state and the output data format of TVP5150 should be configured. In this paper, it describes the method of initializing TVP5150 through FPGA based on IIC bus. And then, introduce the format of ITU-R BT.656 of the output video data and the way of extracting the available data from ITU-R BT.656.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

IEEE Conference Anthology

自引率

0.00%

发文量