24GHz, 18dBm，宽带，28nm FDSOI三堆叠功率放大器

2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC) Pub Date : 2018-10-01 DOI:10.1109/NORCHIP.2018.8573450

I. Din, S. Andersson, Therese Forsberg, H. Sjöland

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引用次数: 2

摘要

提出了一种采用28nm全耗尽绝缘体上硅互补金属氧化物半导体技术(FDSOI CMOS)实现的三层叠加功率放大器。它具有片上输入和输出变压器平衡的差分架构。该放大器的饱和输出功率水平为17.9dBm，峰值功率增加效率为7%，输出参考增益压缩点为16.2dBm。它占用了0.4$mm^{2}$的硅面积，使用3V的电源电压，在24GHz时具有3.3GHz的1-dB带宽。

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A 24GHz, 18dBm, Broadband, Three Stacked Power Amplifier in 28nm FDSOI

A three stacked power amplifier implemented in 28nm fully depleted silicon-on-insulator complementary metal oxide semi-conductor technology (FDSOI CMOS) is presented. It has a differential architecture with on-chip input and output transformer baluns. The PA achieves a saturated output power level of 17.9dBm with a peak power added efficiency of 7% and an output referred gain compression point of 16.2dBm. It occupies a silicon area of 0.4$mm^{2}$, uses a supply voltage of 3V, and has a 3.3GHz 1-dB bandwidth at 24GHz.

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来源期刊

2018 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC)

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