{"title":"碰撞检测VLSI处理器的单晶体管单元多值CAM","authors":"T. Hanyu, N. Kanagawa, M. Kameyama","doi":"10.1109/ISSCC.1996.488616","DOIUrl":null,"url":null,"abstract":"Parallel search and parallel comparison are major advantages of content-addressable memories (CAMs) over random-access memories. However, a CAM is more complex and has lower storage density than a conventional address-based memory because of the overhead involved in the storage, comparison, manipulation, and output-selection logic. A CAM based on multiple-valued logic is proposed for high-speed word-parallel magnitude comparison. A typical application of the multiple-valued CAM is a collision detection VLSI processor for intelligent vehicles.","PeriodicalId":162539,"journal":{"name":"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC","volume":"174 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1996-02-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"8","resultStr":"{\"title\":\"One-transistor-cell multiple-valued CAM for a collision detection VLSI processor\",\"authors\":\"T. Hanyu, N. Kanagawa, M. Kameyama\",\"doi\":\"10.1109/ISSCC.1996.488616\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Parallel search and parallel comparison are major advantages of content-addressable memories (CAMs) over random-access memories. However, a CAM is more complex and has lower storage density than a conventional address-based memory because of the overhead involved in the storage, comparison, manipulation, and output-selection logic. A CAM based on multiple-valued logic is proposed for high-speed word-parallel magnitude comparison. A typical application of the multiple-valued CAM is a collision detection VLSI processor for intelligent vehicles.\",\"PeriodicalId\":162539,\"journal\":{\"name\":\"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC\",\"volume\":\"174 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1996-02-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"8\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1996.488616\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1996 IEEE International Solid-State Circuits Conference. Digest of TEchnical Papers, ISSCC","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1996.488616","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
One-transistor-cell multiple-valued CAM for a collision detection VLSI processor
Parallel search and parallel comparison are major advantages of content-addressable memories (CAMs) over random-access memories. However, a CAM is more complex and has lower storage density than a conventional address-based memory because of the overhead involved in the storage, comparison, manipulation, and output-selection logic. A CAM based on multiple-valued logic is proposed for high-speed word-parallel magnitude comparison. A typical application of the multiple-valued CAM is a collision detection VLSI processor for intelligent vehicles.