一种采用堆栈强制泄漏旁路(LBSF)和源跟随器NMOS (SFN)技术的容漏动态寄存器文件

2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302) Pub Date : 2002-06-13 DOI:10.1109/VLSIC.2002.1015115

S. Tang, S. Hsu, Y. Ye, J. Tschanz, D. Somasekhar, S. Narendra, Shih-Lien Lu, R. Krishnamurthy, V. De

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引用次数: 22

摘要

采用LBSF和SFN容漏电路技术的LBL和GBL的多端口、256/spl次/32b动态寄存器文件的时钟频率，与最佳的双v /sub T (DVT)设计相比，提高了50%。全LBSF设计的晶体管总宽度最小。

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A leakage-tolerant dynamic register file using leakage bypass with stack forcing (LBSF) and source follower NMOS (SFN) techniques

Clock frequency of a multi-ported, 256/spl times/32b dynamic register file in a 100nm technology is improved by 50%, compared to the best dual-V/sub T/ (DVT) design, using LBSF and SFN leakage-tolerant circuit techniques for LBL and GBL. Total transistor width of the full LBSF design is the smallest.

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来源期刊

2002 Symposium on VLSI Circuits. Digest of Technical Papers (Cat. No.02CH37302)

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