{"title":"基于神经元mosfet的自学习神经网络LSI","authors":"T. Shibata, T. Ohmi","doi":"10.1109/VLSIT.1992.200660","DOIUrl":null,"url":null,"abstract":"A functional MOS transistor called a neuron MOSFET (vMOS) which simulates the function of biological neurons is discussed. A method of constructing neural network LSIs that have a self-learning capability using the neuron MOSFET is given. The key is the implementation of a synaptic connection which changes its weight according to various learning algorithms. In addition, the synapse must be free from standby power dissipation and be as small as possible.<<ETX>>","PeriodicalId":404756,"journal":{"name":"1992 Symposium on VLSI Technology Digest of Technical Papers","volume":"20 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1992-06-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"17","resultStr":"{\"title\":\"A self-learning neural-network LSI using neuron MOSFETs\",\"authors\":\"T. Shibata, T. Ohmi\",\"doi\":\"10.1109/VLSIT.1992.200660\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A functional MOS transistor called a neuron MOSFET (vMOS) which simulates the function of biological neurons is discussed. A method of constructing neural network LSIs that have a self-learning capability using the neuron MOSFET is given. The key is the implementation of a synaptic connection which changes its weight according to various learning algorithms. In addition, the synapse must be free from standby power dissipation and be as small as possible.<<ETX>>\",\"PeriodicalId\":404756,\"journal\":{\"name\":\"1992 Symposium on VLSI Technology Digest of Technical Papers\",\"volume\":\"20 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1992-06-02\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"17\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1992 Symposium on VLSI Technology Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/VLSIT.1992.200660\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1992 Symposium on VLSI Technology Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/VLSIT.1992.200660","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A self-learning neural-network LSI using neuron MOSFETs
A functional MOS transistor called a neuron MOSFET (vMOS) which simulates the function of biological neurons is discussed. A method of constructing neural network LSIs that have a self-learning capability using the neuron MOSFET is given. The key is the implementation of a synaptic connection which changes its weight according to various learning algorithms. In addition, the synapse must be free from standby power dissipation and be as small as possible.<>