采用双多晶硅技术的128K闪存EEPROM

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers Pub Date : 1900-01-01 DOI:10.1109/ISSCC.1987.1157210

G. Samachisa, C. Su, Y. Kao, G. Smarandoiu, T. Wong, C. Hu

{"title":"采用双多晶硅技术的128K闪存EEPROM","authors":"G. Samachisa, C. Su, Y. Kao, G. Smarandoiu, T. Wong, C. Hu","doi":"10.1109/ISSCC.1987.1157210","DOIUrl":null,"url":null,"abstract":"An EEPROM with a 43μm2cell containing an integral select transistor will be reported. The chip features 140ns access time, 1ms/byte program time, 1s chip erase time and 1000 cycle endurance. Yields of the 4.6×3.4mm chip in a 2.5μm NMOS process are comparable to those of an EPROM.","PeriodicalId":102932,"journal":{"name":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","volume":"1 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"10","resultStr":"{\"title\":\"A 128K flash EEPROM using double polysilicon technology\",\"authors\":\"G. Samachisa, C. Su, Y. Kao, G. Smarandoiu, T. Wong, C. Hu\",\"doi\":\"10.1109/ISSCC.1987.1157210\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"An EEPROM with a 43μm2cell containing an integral select transistor will be reported. The chip features 140ns access time, 1ms/byte program time, 1s chip erase time and 1000 cycle endurance. Yields of the 4.6×3.4mm chip in a 2.5μm NMOS process are comparable to those of an EPROM.\",\"PeriodicalId\":102932,\"journal\":{\"name\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"volume\":\"1 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1900-01-01\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"10\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ISSCC.1987.1157210\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ISSCC.1987.1157210","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 10

摘要

一个43μm2单元的EEPROM包含一个集成选择晶体管将被报道。该芯片具有140ns的访问时间，1ms/byte的程序时间，1s的芯片擦除时间和1000个周期的寿命。在2.5μm NMOS工艺中4.6×3.4mm芯片的产率与EPROM相当。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A 128K flash EEPROM using double polysilicon technology

An EEPROM with a 43μm2cell containing an integral select transistor will be reported. The chip features 140ns access time, 1ms/byte program time, 1s chip erase time and 1000 cycle endurance. Yields of the 4.6×3.4mm chip in a 2.5μm NMOS process are comparable to those of an EPROM.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

1987 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

自引率

0.00%

发文量