{"title":"用于I/sub DDQ/测试的内置电流传感器(BICS)的局限性","authors":"S. Menon, Y. Malaiya, A. Jayasumana, C. Tong","doi":"10.1109/ATS.1993.398812","DOIUrl":null,"url":null,"abstract":"Quiescent current (I/sub DDQ/) drawn by a static CMOS device is extremely small and is of the order of nanoamperes. Under many faults, (I/sub DDQ/) can increase by several orders of magnitude. Either an external or an on-chip current sensor can be used to detect enhanced static current drawn by a static CMOS device. An on-chip sensor, termed a BICS (Built-In Current Sensor) can be significantly faster. Implementation of BICS has received a lot of interest in the recent years. Some limitations posed by BICS on I/sub DDQ/ measurement caused due to increase in I/sub DDQ/ settling time as well as propagation delay is considered. Results indicate that careful attention needs to be given to circuit partitioning for implementing BICS. Some of the considerations that need to be taken into account while designing new BICS are presented.<<ETX>>","PeriodicalId":228291,"journal":{"name":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1993-11-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"5","resultStr":"{\"title\":\"Limitations of built-in current sensors (BICS) for I/sub DDQ/ testing\",\"authors\":\"S. Menon, Y. Malaiya, A. Jayasumana, C. Tong\",\"doi\":\"10.1109/ATS.1993.398812\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Quiescent current (I/sub DDQ/) drawn by a static CMOS device is extremely small and is of the order of nanoamperes. Under many faults, (I/sub DDQ/) can increase by several orders of magnitude. Either an external or an on-chip current sensor can be used to detect enhanced static current drawn by a static CMOS device. An on-chip sensor, termed a BICS (Built-In Current Sensor) can be significantly faster. Implementation of BICS has received a lot of interest in the recent years. Some limitations posed by BICS on I/sub DDQ/ measurement caused due to increase in I/sub DDQ/ settling time as well as propagation delay is considered. Results indicate that careful attention needs to be given to circuit partitioning for implementing BICS. Some of the considerations that need to be taken into account while designing new BICS are presented.<<ETX>>\",\"PeriodicalId\":228291,\"journal\":{\"name\":\"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)\",\"volume\":\"52 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1993-11-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"5\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ATS.1993.398812\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of 1993 IEEE 2nd Asian Test Symposium (ATS)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ATS.1993.398812","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
Limitations of built-in current sensors (BICS) for I/sub DDQ/ testing
Quiescent current (I/sub DDQ/) drawn by a static CMOS device is extremely small and is of the order of nanoamperes. Under many faults, (I/sub DDQ/) can increase by several orders of magnitude. Either an external or an on-chip current sensor can be used to detect enhanced static current drawn by a static CMOS device. An on-chip sensor, termed a BICS (Built-In Current Sensor) can be significantly faster. Implementation of BICS has received a lot of interest in the recent years. Some limitations posed by BICS on I/sub DDQ/ measurement caused due to increase in I/sub DDQ/ settling time as well as propagation delay is considered. Results indicate that careful attention needs to be given to circuit partitioning for implementing BICS. Some of the considerations that need to be taken into account while designing new BICS are presented.<>