50mm铜/聚合物衬底HBT集成电路技术,适用于> 100ghz mmic

J. Guthrie, D. Mensa, T. Mathew, Q. Lee, S. Krishnan, S. Jaganathan, S. Ceran, Y. Betser, M. Rodwell
{"title":"50mm铜/聚合物衬底HBT集成电路技术,适用于> 100ghz mmic","authors":"J. Guthrie, D. Mensa, T. Mathew, Q. Lee, S. Krishnan, S. Jaganathan, S. Ceran, Y. Betser, M. Rodwell","doi":"10.1109/ICIPRM.1999.773724","DOIUrl":null,"url":null,"abstract":"We report HBT integrated circuits fabricated by substrate transfer on 50 mm diameter copper/polymer substrates. Layout and packaging of complex /spl sim/100 GHz circuits is facilitated by the microstrip wiring environment and the low ground lead inductance it affords. For ICs operating above 100 GHz, the process allows radical scaling of the microstrip dielectric thickness without requiring handling of delicate thinned III-V wafers. The process can provide greatly improved heatsinking. Furthermore, full 50 mm wafers can be processed incorporating transferred substrate HBTs, devices which have obtained >500 GHz f/sub max/.","PeriodicalId":213868,"journal":{"name":"Conference Proceedings. Eleventh International Conference on Indium Phosphide and Related Materials (IPRM'99) (Cat. No.99CH36362)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1999-05-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"2","resultStr":"{\"title\":\"A 50 mm copper/polymer substrate HBT IC technology for >100 GHz MMICs\",\"authors\":\"J. Guthrie, D. Mensa, T. Mathew, Q. Lee, S. Krishnan, S. Jaganathan, S. Ceran, Y. Betser, M. Rodwell\",\"doi\":\"10.1109/ICIPRM.1999.773724\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"We report HBT integrated circuits fabricated by substrate transfer on 50 mm diameter copper/polymer substrates. Layout and packaging of complex /spl sim/100 GHz circuits is facilitated by the microstrip wiring environment and the low ground lead inductance it affords. For ICs operating above 100 GHz, the process allows radical scaling of the microstrip dielectric thickness without requiring handling of delicate thinned III-V wafers. The process can provide greatly improved heatsinking. Furthermore, full 50 mm wafers can be processed incorporating transferred substrate HBTs, devices which have obtained >500 GHz f/sub max/.\",\"PeriodicalId\":213868,\"journal\":{\"name\":\"Conference Proceedings. Eleventh International Conference on Indium Phosphide and Related Materials (IPRM'99) (Cat. No.99CH36362)\",\"volume\":\"6 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1999-05-16\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"2\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Conference Proceedings. Eleventh International Conference on Indium Phosphide and Related Materials (IPRM'99) (Cat. No.99CH36362)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICIPRM.1999.773724\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Conference Proceedings. Eleventh International Conference on Indium Phosphide and Related Materials (IPRM'99) (Cat. No.99CH36362)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICIPRM.1999.773724","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 2

摘要

我们报道了在直径50mm的铜/聚合物衬底上通过衬底转移制备的HBT集成电路。复杂/spl sim/ 100ghz电路的布局和封装是由微带布线环境和它提供的低接地引线电感方便。对于工作在100 GHz以上的ic,该工艺允许微带介电厚度的根本缩放,而无需处理精细的薄III-V晶圆。该工艺可以大大改善散热。此外,完整的50毫米晶圆可以加工包含转移基板HBTs的晶圆,器件获得>500 GHz f/sub max/。
本文章由计算机程序翻译,如有差异,请以英文原文为准。
A 50 mm copper/polymer substrate HBT IC technology for >100 GHz MMICs
We report HBT integrated circuits fabricated by substrate transfer on 50 mm diameter copper/polymer substrates. Layout and packaging of complex /spl sim/100 GHz circuits is facilitated by the microstrip wiring environment and the low ground lead inductance it affords. For ICs operating above 100 GHz, the process allows radical scaling of the microstrip dielectric thickness without requiring handling of delicate thinned III-V wafers. The process can provide greatly improved heatsinking. Furthermore, full 50 mm wafers can be processed incorporating transferred substrate HBTs, devices which have obtained >500 GHz f/sub max/.
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