{"title":"用于二次谐波心脏超声成像的低噪声单端差分线性电荷采样SC-VGA","authors":"P. Wang, T. Ytterdal, T. Halvorsrod","doi":"10.1109/ECCTD.2013.6662288","DOIUrl":null,"url":null,"abstract":"A low noise single-ended to differential linear switched capacitor variable gain amplifier (SC-VGA) is designed in a 0.18μm CMOS technology for 4MHz center frequency (fs) 26-MHz ultrasound imaging. To fit the higher source impedance from gradually scaled piezo-electric transducers (PZT) in ultrasound imaging systems, a charge sampling amplifier with a fixed integration time as the first stage exhibits the lower noise, and higher sensitivity compared to the conventional voltage sampling amplifiers. The second voltage sampling stage converts the single-ended input to differential outputs with an exponential gain control which exploits an 8b binary capacitor (CAP) array, and the gain varies dB-in-linear from -14dB to 14dB. To reduce the capacitance spread for a binary-weighted 8b CAP array, the array is segmented between the upper 4b and lower 4b by a divider capacitor. Simulation results show the analog part of proposed amplifier consumes 1.25mA at 1.8V, has HD2 -62dB, HD3 -79dB at 150mV output Vpp, and the input referred noise (IRN) is 6.56pA/√Hz at 4MHz and 25.3nArms at a sampling frequency (fs) of 30MHz. The layout size is 310μm×370μm.","PeriodicalId":342333,"journal":{"name":"2013 European Conference on Circuit Theory and Design (ECCTD)","volume":"20 2","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2013-11-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"3","resultStr":"{\"title\":\"A low noise single-ended to differential linear charge sampling SC-VGA for second harmonic cardiac ultrasound imaging\",\"authors\":\"P. Wang, T. Ytterdal, T. Halvorsrod\",\"doi\":\"10.1109/ECCTD.2013.6662288\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A low noise single-ended to differential linear switched capacitor variable gain amplifier (SC-VGA) is designed in a 0.18μm CMOS technology for 4MHz center frequency (fs) 26-MHz ultrasound imaging. To fit the higher source impedance from gradually scaled piezo-electric transducers (PZT) in ultrasound imaging systems, a charge sampling amplifier with a fixed integration time as the first stage exhibits the lower noise, and higher sensitivity compared to the conventional voltage sampling amplifiers. The second voltage sampling stage converts the single-ended input to differential outputs with an exponential gain control which exploits an 8b binary capacitor (CAP) array, and the gain varies dB-in-linear from -14dB to 14dB. To reduce the capacitance spread for a binary-weighted 8b CAP array, the array is segmented between the upper 4b and lower 4b by a divider capacitor. Simulation results show the analog part of proposed amplifier consumes 1.25mA at 1.8V, has HD2 -62dB, HD3 -79dB at 150mV output Vpp, and the input referred noise (IRN) is 6.56pA/√Hz at 4MHz and 25.3nArms at a sampling frequency (fs) of 30MHz. The layout size is 310μm×370μm.\",\"PeriodicalId\":342333,\"journal\":{\"name\":\"2013 European Conference on Circuit Theory and Design (ECCTD)\",\"volume\":\"20 2\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2013-11-14\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"3\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"2013 European Conference on Circuit Theory and Design (ECCTD)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ECCTD.2013.6662288\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"2013 European Conference on Circuit Theory and Design (ECCTD)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ECCTD.2013.6662288","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
A low noise single-ended to differential linear charge sampling SC-VGA for second harmonic cardiac ultrasound imaging
A low noise single-ended to differential linear switched capacitor variable gain amplifier (SC-VGA) is designed in a 0.18μm CMOS technology for 4MHz center frequency (fs) 26-MHz ultrasound imaging. To fit the higher source impedance from gradually scaled piezo-electric transducers (PZT) in ultrasound imaging systems, a charge sampling amplifier with a fixed integration time as the first stage exhibits the lower noise, and higher sensitivity compared to the conventional voltage sampling amplifiers. The second voltage sampling stage converts the single-ended input to differential outputs with an exponential gain control which exploits an 8b binary capacitor (CAP) array, and the gain varies dB-in-linear from -14dB to 14dB. To reduce the capacitance spread for a binary-weighted 8b CAP array, the array is segmented between the upper 4b and lower 4b by a divider capacitor. Simulation results show the analog part of proposed amplifier consumes 1.25mA at 1.8V, has HD2 -62dB, HD3 -79dB at 150mV output Vpp, and the input referred noise (IRN) is 6.56pA/√Hz at 4MHz and 25.3nArms at a sampling frequency (fs) of 30MHz. The layout size is 310μm×370μm.