InP hfet中陷阱相关漏极滞后效应的研究

Proceedings of 8th International Conference on Indium Phosphide and Related Materials Pub Date : 1996-04-21 DOI:10.1109/ICIPRM.1996.492382

A. Gautier-Levine, P. Audren, G. Post, M. Favennec, J. Dumas

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引用次数: 2

摘要

漏极滞后效应是III-V型半导体上场效应晶体管的低频寄生效应。分别用InP半导体和四元晶格匹配的化合物通道制备了HFET器件。通过对这两种器件漏极滞后值的研究，强调了合理的工艺流程的重要性。

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A study of trap related drain lag effects in InP HFETs

The drain lag effect is a low frequency parasitic response of field effect transistors on III-V semiconductors. HFET devices were fabricated with InP semiconductor and quaternary lattice-matched compound channels, respectively. From the study of the drain lag value of these two types of devices, the importance of proper technological processes is emphasized.

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Proceedings of 8th International Conference on Indium Phosphide and Related Materials

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