累积后极电压对ELTRAN和UNIBOND晶圆上0.13 /spl mu/m全耗尽SOI mosfet低频噪声谱的影响

Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850) Pub Date : 2004-11-15 DOI:10.1109/ESSDER.2004.1356563

N. Litkyanchikova, N. Garbar, A. Smolanka, E. Simoen, C. Claeys

{"title":"累积后极电压对ELTRAN和UNIBOND晶圆上0.13 /spl mu/m全耗尽SOI mosfet低频噪声谱的影响","authors":"N. Litkyanchikova, N. Garbar, A. Smolanka, E. Simoen, C. Claeys","doi":"10.1109/ESSDER.2004.1356563","DOIUrl":null,"url":null,"abstract":"The behaviour of so-called back-gate induced Lorentzians has been investigated in fully depleted (FD) silicon-on-insulator (SOI) MOSFETs, fabricated in a 0.13 /spl mu/m CMOS technology, on ELTRAN and UNIBOND wafers. While this excess low-frequency (LF) noise source is fairly easily observed in ELTRAN (E) p-and UNIBOND (U) nMOSFETs, when the back-gate voltage (V/sub GB/) is in accumulation, this is not true for their n-(E) and p-channel (U) counterparts. It is be demonstrated that the origin of this novel noise source resembles the one of the electron valence band (EVB) tunnelling related Lorentzians, although it occurs at front-gate voltages below the EVB tunnelling threshold. It is shown that in this case, the RC-filtered Nyquist noise of the source and drain junctions at the back interface is the main cause of the excess Lorentzians.","PeriodicalId":287103,"journal":{"name":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2004-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"0","resultStr":"{\"title\":\"Influence of an accumulation back-gate voltage on the low-frequency noise spectra of 0.13 /spl mu/m fully-depleted SOI MOSFETs fabricated on ELTRAN and UNIBOND wafers\",\"authors\":\"N. Litkyanchikova, N. Garbar, A. Smolanka, E. Simoen, C. Claeys\",\"doi\":\"10.1109/ESSDER.2004.1356563\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"The behaviour of so-called back-gate induced Lorentzians has been investigated in fully depleted (FD) silicon-on-insulator (SOI) MOSFETs, fabricated in a 0.13 /spl mu/m CMOS technology, on ELTRAN and UNIBOND wafers. While this excess low-frequency (LF) noise source is fairly easily observed in ELTRAN (E) p-and UNIBOND (U) nMOSFETs, when the back-gate voltage (V/sub GB/) is in accumulation, this is not true for their n-(E) and p-channel (U) counterparts. It is be demonstrated that the origin of this novel noise source resembles the one of the electron valence band (EVB) tunnelling related Lorentzians, although it occurs at front-gate voltages below the EVB tunnelling threshold. It is shown that in this case, the RC-filtered Nyquist noise of the source and drain junctions at the back interface is the main cause of the excess Lorentzians.\",\"PeriodicalId\":287103,\"journal\":{\"name\":\"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)\",\"volume\":\"76 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2004-11-15\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"0\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ESSDER.2004.1356563\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ESSDER.2004.1356563","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 0

摘要

在ELTRAN和UNIBOND晶圆上以0.13 /spl mu/m CMOS技术制造的完全耗尽(FD)绝缘体上硅(SOI) mosfet中，研究了所谓的反向诱导洛伦兹子的行为。虽然在ELTRAN (E) p-和UNIBOND (U) nmosfet中很容易观察到这种过量的低频(LF)噪声源，但当后门电压(V/sub GB/)积累时，对于它们的n-(E)和p-通道(U)对应物来说，情况并非如此。研究表明，这种新型噪声源的来源类似于电子价带隧穿相关的洛伦兹子，尽管它发生在低于电子价带隧穿阈值的前门电压。结果表明，在这种情况下，后界面处源极和漏极的rc滤波奈奎斯特噪声是导致洛伦兹量过剩的主要原因。

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Influence of an accumulation back-gate voltage on the low-frequency noise spectra of 0.13 /spl mu/m fully-depleted SOI MOSFETs fabricated on ELTRAN and UNIBOND wafers

The behaviour of so-called back-gate induced Lorentzians has been investigated in fully depleted (FD) silicon-on-insulator (SOI) MOSFETs, fabricated in a 0.13 /spl mu/m CMOS technology, on ELTRAN and UNIBOND wafers. While this excess low-frequency (LF) noise source is fairly easily observed in ELTRAN (E) p-and UNIBOND (U) nMOSFETs, when the back-gate voltage (V/sub GB/) is in accumulation, this is not true for their n-(E) and p-channel (U) counterparts. It is be demonstrated that the origin of this novel noise source resembles the one of the electron valence band (EVB) tunnelling related Lorentzians, although it occurs at front-gate voltages below the EVB tunnelling threshold. It is shown that in this case, the RC-filtered Nyquist noise of the source and drain junctions at the back interface is the main cause of the excess Lorentzians.

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Proceedings of the 30th European Solid-State Circuits Conference (IEEE Cat. No.04EX850)

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