用于音频D/A转换器的CMOS低失真采样和保持电路

1989 Proceedings of the IEEE Custom Integrated Circuits Conference Pub Date : 1989-05-15 DOI:10.1109/CICC.1989.56701

N. Sugawa, T. Ikarashi, K. Kuwana, T. Kawakami, A. Kimitsuka, T. Iida

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引用次数: 2

摘要

采用新颖的电路结构和高速运算放大器，设计了一种总谐波失真为0.01%的CMOS低失真采样保持电路，用于音频数模转换器。作为该技术在音频领域的应用，实现了一个具有高分辨率A/D和D/A转换器的音频信号延迟处理LSI。该大规模集成电路采用1.5 μm CMOS工艺，芯片尺寸为18.5 mm2

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CMOS low distortion sample and hold circuit for audio D/A converter

A CMOS low distortion sample and hold circuit with total harmonic distortion of 0.01% for audio D/A (digital-to-analog) convertor has been developed, using a novel circuit architecture and high-speed operational amplifier. As an application of this technology to the audio field, an audio signal delay processing LSI with high-resolution A/D and D/A converters has been realized. The LSI has been fabricated using a 1.5-μm CMOS process and a die size of 18.5 mm2

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1989 Proceedings of the IEEE Custom Integrated Circuits Conference

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