纳米处理器:一种低资源可重构处理器

M. Wirthlin, B. Hutchings, K. Gilson
{"title":"纳米处理器:一种低资源可重构处理器","authors":"M. Wirthlin, B. Hutchings, K. Gilson","doi":"10.1109/FPGA.1994.315595","DOIUrl":null,"url":null,"abstract":"Reconfigurable logic systems approach the performance of application-specific integrated circuits (ASICs) while retaining much of the generality of conventional computing systems through reconfiguration. Unfortunately, the development of these systems, unlike conventional software systems, is hardware-intensive, requiring significant hardware development time. One way to introduce a more flexible development approach is to implement a customizable stored-program processor. For a given application, the designer can develop customized hardware to increase performance and then control the sequencing and operation of this hardware with software. Development time can be significantly reduced because conventional software development tools, e.g. assemblers and compilers, can be used to quickly develop new applications on the customized processor. This paper presents the Nano Processor, a fully customizable reconfigurable processor, together with its integrated assembler, that has been successfully implemented on the Xilinx 3000 series field programmable gate array (FPGA).<<ETX>>","PeriodicalId":138179,"journal":{"name":"Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines","volume":"100 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1994-04-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"79","resultStr":"{\"title\":\"The Nano Processor: a low resource reconfigurable processor\",\"authors\":\"M. Wirthlin, B. Hutchings, K. Gilson\",\"doi\":\"10.1109/FPGA.1994.315595\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Reconfigurable logic systems approach the performance of application-specific integrated circuits (ASICs) while retaining much of the generality of conventional computing systems through reconfiguration. Unfortunately, the development of these systems, unlike conventional software systems, is hardware-intensive, requiring significant hardware development time. One way to introduce a more flexible development approach is to implement a customizable stored-program processor. For a given application, the designer can develop customized hardware to increase performance and then control the sequencing and operation of this hardware with software. Development time can be significantly reduced because conventional software development tools, e.g. assemblers and compilers, can be used to quickly develop new applications on the customized processor. This paper presents the Nano Processor, a fully customizable reconfigurable processor, together with its integrated assembler, that has been successfully implemented on the Xilinx 3000 series field programmable gate array (FPGA).<<ETX>>\",\"PeriodicalId\":138179,\"journal\":{\"name\":\"Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines\",\"volume\":\"100 \",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1994-04-10\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"79\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/FPGA.1994.315595\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/FPGA.1994.315595","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 79

摘要

可重构逻辑系统接近专用集成电路(asic)的性能,同时通过重构保留了传统计算系统的大部分通用性。不幸的是,与传统的软件系统不同,这些系统的开发是硬件密集型的,需要大量的硬件开发时间。引入更灵活的开发方法的一种方法是实现可定制的存储程序处理器。对于给定的应用程序,设计人员可以开发定制的硬件来提高性能,然后用软件控制该硬件的排序和操作。开发时间可以大大减少,因为传统的软件开发工具,如汇编器和编译器,可以用来快速开发新的应用程序在定制的处理器。本文介绍了在Xilinx 3000系列现场可编程门阵列(FPGA)上成功实现的完全可定制可重构处理器Nano Processor及其集成汇编器
本文章由计算机程序翻译,如有差异,请以英文原文为准。
The Nano Processor: a low resource reconfigurable processor
Reconfigurable logic systems approach the performance of application-specific integrated circuits (ASICs) while retaining much of the generality of conventional computing systems through reconfiguration. Unfortunately, the development of these systems, unlike conventional software systems, is hardware-intensive, requiring significant hardware development time. One way to introduce a more flexible development approach is to implement a customizable stored-program processor. For a given application, the designer can develop customized hardware to increase performance and then control the sequencing and operation of this hardware with software. Development time can be significantly reduced because conventional software development tools, e.g. assemblers and compilers, can be used to quickly develop new applications on the customized processor. This paper presents the Nano Processor, a fully customizable reconfigurable processor, together with its integrated assembler, that has been successfully implemented on the Xilinx 3000 series field programmable gate array (FPGA).<>
求助全文
通过发布文献求助,成功后即可免费获取论文全文。 去求助
来源期刊
自引率
0.00%
发文量
0
×
引用
GB/T 7714-2015
复制
MLA
复制
APA
复制
导出至
BibTeX EndNote RefMan NoteFirst NoteExpress
×
提示
您的信息不完整,为了账户安全,请先补充。
现在去补充
×
提示
您因"违规操作"
具体请查看互助需知
我知道了
×
提示
确定
请完成安全验证×
copy
已复制链接
快去分享给好友吧!
我知道了
右上角分享
点击右上角分享
0
联系我们:info@booksci.cn Book学术提供免费学术资源搜索服务,方便国内外学者检索中英文文献。致力于提供最便捷和优质的服务体验。 Copyright © 2023 布克学术 All rights reserved.
京ICP备2023020795号-1
ghs 京公网安备 11010802042870号
Book学术文献互助
Book学术文献互助群
群 号:481959085
Book学术官方微信