一种新的设计方法，使用仿真的片上ESD保护设计集成电路

1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105) Pub Date : 1998-10-21 DOI:10.1109/ICSICT.1998.785933

A. Wang, C. Tsay

{"title":"一种新的设计方法，使用仿真的片上ESD保护设计集成电路","authors":"A. Wang, C. Tsay","doi":"10.1109/ICSICT.1998.785933","DOIUrl":null,"url":null,"abstract":"A new design methodology was developed for IC on-chip ESD protection design using a full-scale, mixed-mode simulation approach. The complete design procedure and design examples are discussed and reasonably good design prediction was observed in using this novel design methodology.","PeriodicalId":286980,"journal":{"name":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","volume":"229 ","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"1998-10-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"12","resultStr":"{\"title\":\"A new design methodology using simulation for on-chip ESD protection designs for integrated circuits\",\"authors\":\"A. Wang, C. Tsay\",\"doi\":\"10.1109/ICSICT.1998.785933\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"A new design methodology was developed for IC on-chip ESD protection design using a full-scale, mixed-mode simulation approach. The complete design procedure and design examples are discussed and reasonably good design prediction was observed in using this novel design methodology.\",\"PeriodicalId\":286980,\"journal\":{\"name\":\"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)\",\"volume\":\"229 \",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"1998-10-21\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"12\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/ICSICT.1998.785933\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/ICSICT.1998.785933","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}

引用次数: 12

摘要

采用全尺寸混合模式仿真方法，为集成电路片上ESD保护设计开发了一种新的设计方法。讨论了完整的设计过程和设计实例，并在应用该设计方法时取得了较好的设计预测效果。

本文章由计算机程序翻译，如有差异，请以英文原文为准。

查看原文本刊更多论文

A new design methodology using simulation for on-chip ESD protection designs for integrated circuits

A new design methodology was developed for IC on-chip ESD protection design using a full-scale, mixed-mode simulation approach. The complete design procedure and design examples are discussed and reasonably good design prediction was observed in using this novel design methodology.

求助全文

通过发布文献求助，成功后即可免费获取论文全文。去求助

来源期刊

1998 5th International Conference on Solid-State and Integrated Circuit Technology. Proceedings (Cat. No.98EX105)

自引率

0.00%

发文量