{"title":"用于集成加速度计的CMOS开关电容接口电路","authors":"H. Kulah, N. Yazdi, K. Najafi","doi":"10.1109/MWSCAS.2000.951630","DOIUrl":null,"url":null,"abstract":"Presents a CMOS interface electronics for monolithic micromachined capacitive accelerometer systems. The interface electronics is a fully differential switched-capacitor charge integrator with its internal clock generator and sensor feedback circuit for closed-loop operation. The circuit is designed for open-loop and closed-loop operations, and provides both digital and differential analog outputs. One of the main advantages of this chip is that it can be monolithically integrated with the sensor, resulting in a considerably increased sensor module performance by decreasing the overall system area, minimizing the interface parasitics, and simplifying the packaging. The interface electronics operates at 200kHz sampling clock and provides an adjustable sensitivity between 0.3 and 1.2V/pF with better than 100aF expected resolution resulting in a 93dB dynamic range for 1Hz bandwidth. The total chip dissipates less than 7.2mW power from a single 5V supply, and occupies an area of 3.4/spl times/3.6 mm/sup 2/ in 3/spl mu/m one-metal two-poly p-well. CMOS process of University of Michigan.","PeriodicalId":437349,"journal":{"name":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","volume":"300 1","pages":"0"},"PeriodicalIF":0.0000,"publicationDate":"2000-08-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":"19","resultStr":"{\"title\":\"A CMOS switched-capacitor interface circuit for an integrated accelerometer\",\"authors\":\"H. Kulah, N. Yazdi, K. Najafi\",\"doi\":\"10.1109/MWSCAS.2000.951630\",\"DOIUrl\":null,\"url\":null,\"abstract\":\"Presents a CMOS interface electronics for monolithic micromachined capacitive accelerometer systems. The interface electronics is a fully differential switched-capacitor charge integrator with its internal clock generator and sensor feedback circuit for closed-loop operation. The circuit is designed for open-loop and closed-loop operations, and provides both digital and differential analog outputs. One of the main advantages of this chip is that it can be monolithically integrated with the sensor, resulting in a considerably increased sensor module performance by decreasing the overall system area, minimizing the interface parasitics, and simplifying the packaging. The interface electronics operates at 200kHz sampling clock and provides an adjustable sensitivity between 0.3 and 1.2V/pF with better than 100aF expected resolution resulting in a 93dB dynamic range for 1Hz bandwidth. The total chip dissipates less than 7.2mW power from a single 5V supply, and occupies an area of 3.4/spl times/3.6 mm/sup 2/ in 3/spl mu/m one-metal two-poly p-well. CMOS process of University of Michigan.\",\"PeriodicalId\":437349,\"journal\":{\"name\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"volume\":\"300 1\",\"pages\":\"0\"},\"PeriodicalIF\":0.0000,\"publicationDate\":\"2000-08-08\",\"publicationTypes\":\"Journal Article\",\"fieldsOfStudy\":null,\"isOpenAccess\":false,\"openAccessPdf\":\"\",\"citationCount\":\"19\",\"resultStr\":null,\"platform\":\"Semanticscholar\",\"paperid\":null,\"PeriodicalName\":\"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)\",\"FirstCategoryId\":\"1085\",\"ListUrlMain\":\"https://doi.org/10.1109/MWSCAS.2000.951630\",\"RegionNum\":0,\"RegionCategory\":null,\"ArticlePicture\":[],\"TitleCN\":null,\"AbstractTextCN\":null,\"PMCID\":null,\"EPubDate\":\"\",\"PubModel\":\"\",\"JCR\":\"\",\"JCRName\":\"\",\"Score\":null,\"Total\":0}","platform":"Semanticscholar","paperid":null,"PeriodicalName":"Proceedings of the 43rd IEEE Midwest Symposium on Circuits and Systems (Cat.No.CH37144)","FirstCategoryId":"1085","ListUrlMain":"https://doi.org/10.1109/MWSCAS.2000.951630","RegionNum":0,"RegionCategory":null,"ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":null,"EPubDate":"","PubModel":"","JCR":"","JCRName":"","Score":null,"Total":0}
引用次数: 19
摘要
介绍了一种用于单片微机械电容式加速度计系统的CMOS接口电子学。接口电子器件是一个全差分开关电容电荷积分器,其内部时钟发生器和传感器反馈电路用于闭环操作。该电路设计用于开环和闭环操作,并提供数字和差分模拟输出。该芯片的主要优点之一是它可以与传感器单片集成,从而通过减小整个系统面积、最小化接口寄生和简化封装来显着提高传感器模块的性能。接口电子器件在200kHz采样时钟下工作,提供0.3至1.2V/pF之间的可调灵敏度,预期分辨率优于100aF,从而在1Hz带宽下实现93dB动态范围。单5V电源的总功耗小于7.2mW,占地面积为3.4/spl倍/3.6 mm/sup / in /3 /spl mu/m单金属双聚p阱。密歇根大学的CMOS工艺。
A CMOS switched-capacitor interface circuit for an integrated accelerometer
Presents a CMOS interface electronics for monolithic micromachined capacitive accelerometer systems. The interface electronics is a fully differential switched-capacitor charge integrator with its internal clock generator and sensor feedback circuit for closed-loop operation. The circuit is designed for open-loop and closed-loop operations, and provides both digital and differential analog outputs. One of the main advantages of this chip is that it can be monolithically integrated with the sensor, resulting in a considerably increased sensor module performance by decreasing the overall system area, minimizing the interface parasitics, and simplifying the packaging. The interface electronics operates at 200kHz sampling clock and provides an adjustable sensitivity between 0.3 and 1.2V/pF with better than 100aF expected resolution resulting in a 93dB dynamic range for 1Hz bandwidth. The total chip dissipates less than 7.2mW power from a single 5V supply, and occupies an area of 3.4/spl times/3.6 mm/sup 2/ in 3/spl mu/m one-metal two-poly p-well. CMOS process of University of Michigan.